LIBRARY OF THE UNIVERSITY OF ILLINOIS AT URBANA-CHAMPAIGN 5IO. 84- UQ>r no.?03 -706 cop. 2/ UIUCDCS-R-T5-T06 y^uu^ THE DESIGN AND IMPLEMENTATION OF A CALCULATOR TERMINAL by John Patrick Sheehan March, 1975 DEPARTMENT OF COMPUTER SCIENCE UNIVERSITY OF ILLINOIS AT URBANA-CHAMPAIGN URBANA, ILLINOIS 1H£ UBRAItt OF THE JUN 3 1975 UNIVERSITY OF ILLINOIS Digitized by the Internet Archive in 2013 http://archive.org/details/designimplementa706shee UIUCDCS-R-75-706 THE DESIGN AND IMPLEMENTATION OF A CALCULATOR TERMINAL by John Patrick Sheehan March, 1975 Department of Computer Science University of Illinois Urbana, Illinois 6l801 Submitted in partial fulfillment for the requirements for the degree of Master of Science in Electrical Engineering, March 1975 • Ill ACKNOWLEDGEMENTS The author would like to thank Professor Michael Faiman for his ad- vice and support throughout the development of this project and the writing of this thesis. Special thanks also goes to Professor Donald Gillies who provided the computer so that the project could be tested and verified. Greg Chesson, Paul Krabee, and Ian Stocks have invested an amount of time and effort in helping me with the various computer software and hardware difficulties. I am deeply indebted to them. I am very grateful to Ms. Evelyn Huxhold who has done an excellent job of typing the final thesis. And, most especially, I am indebted to my wife, Debra, for her patience in typing the countless preliminary drafts and for her constant encouragement throughout the project. IV TABLE OF CONTENTS Chapters Page 1 INTRODUCTION 1 1.1 Calculators - Bridging the Gap ----------- 1 1.2 Outline of the Problem 3 1.3 Summary of the Thesis --------------- 5 2 THE CALCULATOR PROCESSOR 7 2.1 Introduction -------------------- 7 2.2 Processor Design Objectives ------------ 7 2.3 Microprocessors ----------_______- 8 2.3.1 Algorithm Implementation ---------- 9 2.3.2 Circuit Implementation ----------- 12 2.h Calculator Element lk 2.5 Comparison --------------------- 18 3 THE CALCULATOR 20 3.1 Introduction -------------------- 20 3.2 Functional Description --------------- 20 3.3 The Calculator Circuit 23 3.U Stand-Alone Calculator 26 h SYSTEM DESIGN 28 k.l Types of Data Paths 28 k.2 Control of Data Paths 32 k.3 Communication Synchronization ----------- 37 h.k Summary of System Design -------------- Ul 5 IMPLEMENTATION hk 5.1 The Calculator Processor -------------- U7 V Chapters Page 5.2 Display, Drivers, and Display Selector ------- 1+7 5.3 Key Input Decoder ------_-----_-___ 1+7 5.1* Keyboard and Key Output Control ---------- 50 5.5 Display Input from Computer ------------ 52 5.6 CP Result and Key Output 52 5.7 Control Registers and Status Lights -------- 55 5.8 Transmitter and Receiver -------------- 57 6 OPERATION 59 6.1 The Monitor 59 6.2 The Program 62 7 SUMMARY AND CONCLUSION 6k 7.1 Brief Review 6U 7.2 Effectiveness of Design 65 7.3 Design Dependency upon CP and Computer ------- 65 7.^ Performance Enhancement -------------- 67 7.^.1 Speed Considerations ------------ 67 l.k.2 Simpler Design 69 7.^+.3 Increased Capabilities ----------- 69 8 REFERENCES 71 9 APPENDIX 72 CHAPTER 1 INTRODUCTION 1.1 Calculators - Bridging the Gap Until the introduction of hand held calculators, engineers have depended heavily on general purpose computers and slide rules to assist them in making day-to-day calculations. These machines have been used to solve a wide variety of problems with different speed and accuracy requirements. Perhaps most familiar to the engineer has been the slide rule with its numerous scales and moving parts. This analog device is capable of pro- viding results with two or three significant digits of accuracy. It is por- table, fairly easy to use and, most important, inexpensive. Problems of a more complex nature, or those requiring more accuracy, have forced the engineer to rely on the computer. Unlike slide rules, these machines can be programmed to execute a sequence of instructions and sub- routines - a highly desired feature. However, the user is still required to write the code, debug the program, furnish the data, and wait his turn to use the machine. Some of these problems were reduced when time-sharing systems brought computer terminals to the user's office. As new developments in technology were made, a miniature "pocket" computer or calculator replaced slide rules as the engineer's most valuable companion. These machines offered speed and accuracy approaching that of a computer, but at the size and convenience rendered previously only by slide rules. High order functions (e.g., sin, exp) can be computed with eight or more significant digits in a fraction of a second. The problem format used with calculators is also an important characteristic since expressions are entered in a straightforward logical manner. Prices were obviously higher than for slide rules, but not so much that the devices became unaffordable. The increased computational capabilities afforded by the calculators, while superior to the slide rule, were greatly inferior to the immense powers of the computer. Indeed the calculators did not replace the computers. Some of these difficulties were overcome with the development of programmable calculators. In addition to the standard calculator features, these machines enabled the operator to specify sequences of instructions. Hence, the machines became a good compromise between large powerful computers and small portable calculators. Unfortunately, the compromise also included an increase in price and size over the pocket machines. The effect of this is that only desk top programmable calculators, costing well over one thousand dollars, are in use today. Furthermore, most applications of the machines do not make full use of the programming features. The engineer then finds him- self paying higher costs with less convenience for calculating capabilities which are not fully used. In recent months it became apparent that it would be practical to de- sign a machine which provided the convenience of a portable calculator and the power of a computer. The primary objectives of such a device would be low cost and portability. Redesigning a computer or a programmable calculator to meet these objectives was considered slightly unrealistic; however, an interface, linking a portable calculator to a computer could become a fair compromise. It was felt that an interface of this type would be valuable for two reasons. First, the operator would be provided with a portable calculator and all the associated conveniences. Secondly, at the operator's discretion, the calculator could be connected temporarily to the computer, tapping its power for solving highly complex problems. At a minimum the user is provided with calculating capabilities on a portable inexpensive machine; more sophis- ticated problems or those requiring sequences of calculations could be solved via the computer interface. A remote terminal such as this could also he used to write programs in the machine, access data files, or run programs. The topic of this thesis is to design and construct a calculator ter- minal as just described. The machine is capable of operating in a stand-alone configuration or can be linked to a computer to run prewritted subroutines. 1.2 Outline of the Problem Two separate systems can be identified in this paper: a computer, and a calculator. Each system has its own input channels, output channels, con- trol circuits, and processor. Consequently each machine is a distinct comput- ing entity which can operate quite independently in the absence of the other; no permanent interface is required. For the purposes of this paper, the computer is defined as a computa- tional machine composed of processor(s) , memory, and I/O channels. It is permanently located in a data processing facility and is not accessible for modifications or long term usage. A calculator is a special purpose machine used for solving simple arithmetic expressions involving the four basic operations (+, -, *, -0 and possibly higher order functions, e.g. trigonometric or logarithmic. The machine is quite portable, usually pocket sized, and normally is battery powered. Up to this point each machine has been described independently, each with its own powers and limitations. The problem presented now is how the two systems can be linked together to perform useful computations. The resulting machine, referred to as a calculator terminal, has characteristics which are unique to both machines independently. The most important property of the calculator terminal is that the operator can select the mode of the machine. The operator would select the calculator mode for solving problems involving computation powers within the capability of the calculator. Problems of a more complex nature, or those re- quiring sequences of execution would be done in the computer mode of opera- tion. The function of the machine is highly dependent upon the specific mode of operation. Hence, the characteristics of the calculator terminal will be examined for each mode separately before the design constraints are specified. When operating as a calculator, the device should provide the operator with a sufficient set of instructions to provide solutions of simple problems. The four basic arithmetic operations: add, subtract, multiply, and divide, are essential members of the instruction set. Higher ordered functions, such as trigonometric and logarithmic, are highly desirable although not mandatory. In general, the larger the instruction set the more convenient the device will be to use and the less often the operator must depend upon a computer. The physical conveniences afforded by pocket calculators have made these devices much more practical for people to use on a day-to-day basis. A calculator terminal would become nothing more than a permanent office fixture if these conveniences could not be realized. The calculator terminal, as presented here, will not be pocket sized. Clearly, this is due to the high cost associated with producing a portable version of the prototype. The operator may choose the computer mode to assist him in executing larger, more complicated, problems. The exact amount of processing that the computer will perform depends totally upon the operator's program. As men- tioned earlier, it is desired to store prewritten subroutines in the computer and to communicate with them from the calculator terminal. The operator initially calls the computer into action and specifies which subroutine is to be executed. All pertinent data required to success- fully execute the subroutine is entered at the calculator terminal. Once the data has been entered the computer begins execution and no further responses are required. Upon completion of the subroutine, the computer will indicate the results on the calculator terminal's display. These characteristics require that the user's subroutine be loaded into the computer prior to being called upon at the calculator terminal. Once this has been done it is not necessary to physically control the computer. That is, all control commands are given through the calculator terminal. The fundamental characteristics of the calculator terminal can be sum- marized as follows! The device is operational as a stand-alone calculator which provides the operator with a sufficient set of instructions to facilitate the evalua- tion of simple arithmetic expressions. At the discretion of the operator, the calculator terminal can be connected to the computer for the purpose of executing subroutines which are resident in the computer. Control informa- tion is transmitted to the computer through the calculator terminal; hence, physical control of the computer is not necessary. 1.3 Summary of the Thesis This thesis describes an investigation into the design of a calculator to computer interface. The main objective of this study is to improve the capability of calculators by showing that it is practical to interface these devices to a computer. This work relies heavily upon recent advancements in integrated circuit technology. Chapter 2 examines two processing elements for possible use as the CP of the calculator terminal. An initial design is proposed for each type, so that estimates may be made of the package count and costs. Based upon these figures, a comparison is made and the CP is chosen. Chapter 3 describes the capabilities of the calculator terminal in the stand-alone mode. The number of available operations is discussed in this chapter as well as operating procedures. The chapter concludes with a brief look at the electronic circuits of a simple calculator. The calculator terminal is first presented in Chapter k with a dis- cussion of the design criteria. Various data paths are examined for possible inclusion into the final design. The result of this chapter is a functional block diagram of the calculator terminal. The implementation of the block diagram is discussed in Chapter 5 where a complete set of logic diagrams is presented. The use of the various control signals and how they are synchronized with the CP are also discussed. The computer monitor is presented in Chapter 6 to give the reader an indication of the power of the computer /calculator terminal pair. Two types of user programs are also presented and discussed. The thesis concludes with a discussion of the effectiveness of the design. Possible modifications are also presented which may enhance the speed and capabilities of the calculator terminal. CHAPTER 2 THE CALCULATOR PROCESSOR 2.1 Introduction The central unit of the calculator terminal is the calculator process- ing element (CP). The CP is responsible for the operation of the machine in the stand-alone mode. It must be capable of performing simple arithmetic operations and, at the same time, of being easily interfaced to the computer. Two different processing element's are examined in this chapter for this application: a microprocessor and a commercial calculator element. The examination begins with a discussion of the characteristics of the CP, these can be classified as essential and desirable. It is observed that several of these characteristics can be used to evaluate the effective- ness of the type of processors. The machines are analyzed separately and methods are proposed for implementing a complete calculator terminal for each. The result of this is a listing of the package count and costs associated with each method. These figures are compared and a particular processor is suggested. 2.2 Processor Design Objectives The calculator processor must be designed so that the user is provided with a sufficient set of operations to enable the evaluation of simple arith- metic expressions in a stand-alone mode. Furthermore, the device must be easily interfaced to a computer when problems of a more complex nature are involved. Essential characteristics of the processor will include: 1 - Problem format similar to that of a calculator. 2 - Basic arithmetic operations (+, -, *, v). 3 - Inexpensive - low cost, low package count. h - 8/10 decimal digits of accuracy, 5 - Easily interfaced. The following parameters, while not essential, are considered to be highly- desirable: 1 - Low power consumption, small number of power supplies. 2 - Higher order functions or operations (trigonometric, logorithmic) . 3 - Moderate speed. h - Small physical size. The problem format of the processor should be similar to that of a calculator. Problem entry must be easily understandable and logically organized. The problem entry format will be: (expression) = (operand) (binary operator) (operand) = or (operand) (unary operator) where , operand = expression, number binary operator = (+, - 9 *, ? 9 .-...) unary operator = (SIN, LOG, l/x, ....) These operations should be accurate to eight or ten decimal positions and be completed in a reasonable amount of time. Obvious restrictions are imposed on the physical size and cost of the stand-alone device. For purposes of comparison, it will be convenient to estimate several parameters for each processor type. Three items can be categorized for this purpose: 1 - Package count based on a preliminary design. 2 - Cost of each type based on current market figures. 3 - Number of operations realizable at the above cost and package count. 2. 3 Microprocessors One of the most powerful devices currently on the market is the micro- processor. This device normally consists of one or two integrated circuit packages which may, with the addition of external memory and I/O, be program- med to meet almost any design objective. Although each microprocessor has its own unique instruction set and I/O requirements, it is felt that enough similarities do exist to discuss the devices in general terms. The problems associated with using a microprocessor as the CP can be divided into two groups: interface requirements and algorithm implementation. The following sections describe how a microprocessor could be used to implement the cal- culator terminal. 2.3.1 Algorithm Implementation Microprocessors have an instruction set which usually consists of simple one or two machine cycle commands. These can be divided into four classes: data transfers, arithmetic, control and I/O. Each instruction causes a different action to be taken by the processor. Data transfer instructions are used to move information from one storage location to another. All microprocessors enable data transfers bet- ween memory and registers, and register and I/O devices. In addition, several of the more sophisticated processors have indirect addressing capabilities. Arithmetic instructions are usually binary and may operate on data in memory or in registers. Typically, these instructions include: add, sub- tract, shift, and logical operations. Instructions of a more complex nature are normally not found in microprocessors and must be programmed. Utilizing a microprocessor as the processing element of the calculator will require the use of algorithms which will accept input data, perform the required operations, and present results to the operator. The algorithms are implemented as a program which lists machine instructions necessary to per- form these functions. The programs are permanently stored in a read-only memory (ROM) contained in the calculator. It will also be necessary to store temporary data, input files, and intermediate results - a random-access memory (RAM) can provide these capabilities. The program could consist of a system monitor and several subroutines. The monitor is used to coordiante processing requirements by controlling input/ output and subroutine execution functions. During the normal input stream, 10 the task of the monitor will be to accept numeric data and store them as operands. An arithmetic operation could then be decoded as an address of the relevant subroutine. A subroutine exists in the program which is capable of evaluating each instruction the user may specify. In this manner the size of the monitor is kept to a minimum and program modularity is retained. System expansion can also be easily accommodated by adding ROM's. A typical monitor could be designed as shown in Figure 2.1. The length of the program and the amount of read/write storage re- quired will depend upon the instruction set of the processor and the number of arithmetic operations that are to be implemented. An estimation can be given for the amount of ROM and RAM needed to implement the monitor and the four basic operations. Separate estimates can then be provided for memory requirements needed to implement higher order functions on an individual basis. These figures are indicated in Table 2.1, assuming a microprocessor such as the Intel 8080. FUNCTION ROM RAM* PACKAGES + , - , x , v , CLR Ik x 8 256 x 8 1 1 pes - Ik ROM pes - 256 RAM + , -, i, CLR x 2k x 8 256 x 8 1 pes - 2k ROM /x, x 2 , l/x, u, e 1 pes - 256 RAM +, -, x, v, CLR x 1 pes - 2k ROM Jyi, x 2 , l/x, it, e 3k x 8 256 x 8 1 pes - Ik ROM SIN, COS, TAN, ARC 1 pes - 256 RAM +, -, x, t, CLR x /5c, x 2 , l/x, it, e 1+k x 8 256 x 8 1 pes - Uk ROM LOG, LN, Y x 1 pes - 256 RAM SIN, COS, TAN, ARC *Smallest amount available, Memory Estimates for a Calculator Terminal Design Utilizing a Microprocessor, Table 2.1 11 f START J RESET THE SYSTEM YES STORE IT AS PART OF AN OPERAND YES STORE SUBROUTINE YES , /"^IS THE^\ 'CHARACTER AN ^OPERATION?^ ADDRESS NO \ ' ^sis the\. ' CHARACTER ^ v. AN * ^> ^vSIGNT^^ YES 1 ' NORMALIZE THE NUMBER CALL SUBROUTINE NO STORE SUBROUTINE ADDRESS THE CHARACTER MUST BE A CONTROL KEY, i.e. CL, CLX Proposed Software Monitor for a Calculator Terminal Employing a Microprocessor as the CP. Figure 2.1 12 2.3.2 Circuit Implementation Circuit implementation of a microprocessor deals with the problems of connecting the various integrated circuit packages together to form a useful system. The problems can be divided into four areas: processor, processor control, memory, and I/O devices. Each area will be discussed separately at this time so that the cost and package count of the system can be estimated. The processor and processor control portion of the system are used to accept input data, execute programs, and output the results. The network consists of the microprocessor and clock generator. One package contains the microprocessor while six or more are required to generate the clock pulses. The amount of ROM and RAM used in the memory depends upon the length of the programs. However, regardless of the amount, a package count in the neighborhood of four to six will be required to interface the memory to the processor. Each I/O port of the microprocessor can be assigned an address to facilitate data transfers. Three I/O ports will be required to connect the keys, display, and computer to the processor. At least four or six packages will be required for each I/O interface. A generalized system is given in Figure 2.2 which illustrates how the system might be implemented. In summary, realizing a calculator terminal with a microprocessor can be easily done. The computer is treated as an I/O device to facilitate opera- tion in the computer mode. Implementing arithmetic operations on a microproces- sor becomes quite involved since programs must be written and stored in ROM. Many parameters of the calculator depend upon the program, but any amount of accuracy can be obtained by using the correct algorithms. Package count and cost for a calculator terminal, capable of only the basic arithmetic 13 o > O H I cd •H a CD Eh U o -p cd H ^ o H cd o «H o M cd ■H Q AJ O o H pq CM En Ik operations, are given in Table 2.2. Using these figures, a minimum system would include at least 38 packages at a cost of $270.00 or more. Component Packages Cost Microprocessor ROM (lk x 8) RAM (256 x 8) Processor Control Memory Interface Device Interface 1 1 1 6 6 18 $120 - 360 $ 60 - 100 $ 25 - 50 $ 10 - 20 $ 30 - 50 $ 30 - 75 Estimates of Package Count and Cost of a Calculator Terminal Utilizing a Microprocessor. Table 2.2 2.U Calculator Element Several manufacturers market a complete calculator processor for use in pocket versions of the machines. The processor is normally contained in one or two packages and operates from two power supplies. Major problems are encountered when an attempt is made to interface the processor to a computer. In the following section, the characteristics of a calculator element are presented. This leads to a discussion of how the processor can be used as the CP. A calculator element is an integrated circuit, designed for the sole purpose of being used as the processor of a stand-alone calculator. The number of arithmetic operations which may be evaluated depends upon the par- ticular unit chosen; some are capable of evaluating only the four basic opera- tions (+, -, *, t) while others allow more complex functions. All units have two 1/0 ports: a keyboard and a display. The display consists of n digits which are driven by the calculator with a set of output (segment) lines. Display data is normally available as a 7-segment code in a digit serial manner. The calculator is also 15 provided with a set of input signals which are generated by a keyboard matrix and used to specify numeric entries and arithmetic operations. Normally, the calculator element contains logic for debouncing the switches and blocking out multiple key pushes. Several problems arise when an attempt is made to interface with the calculator element. The keyboard and the display must be made accessible to the computer. At the same time, the computer must be able to enter information into the calculator and obtain results. These problems can be divided into four areas for easy discussion: 1 - Keyboard 2 - Display 3 - Computer to calculator transfers h - Calculator to computer transfers The functional keys which are required by the calculator element must be readable by the computer and the calculator when operating in the computer mode and calculator mode respectively. In addition to these functional keys, the computer will require a few control keys. Data "switches" can be used to direct the flow of key information as shown in Figure 2.3. The display should be capable of representing numeric output from either the computer or the calculator. This can be accomplished by having two sets of segment lines available, one set generated by the computer and the other set generated by the calculator. The display can then be switched from one to the other as desired. Display data from the computer can be stored in a memory device within the calculator terminal. Transfers of information from the computer to the calculator must be entered in the form of key pushes. This can be done by adding a new keyboard to the system for use by the computer. This keyboard, which is functionally equivalent to the user keyboard, could be controlled by signals from the com- puter. 16 DISPLAY "7T" TO COMPUTER FROM COMPUTER CONTROL KEYS An Elementary Calculator Terminal Design Employing a Calculator Element as the CP. Figure 2.3 17 Calculator results which are to "be transmitted to the computer must be converted from T-segment code to binary-coded-decimal (BCD). The result can be stored in a RAM and transmitted as a whole, or the digits can be transmitted serially as they appear on the segment lines. The four problems discussed will require a rather sophisticated con- trol circuit to monitor the state of the various switches as Figure 2.3 indicates. The calculator terminal can be realized by using a calculator element as the CP. The number of operations which can be evaluated depends upon the specific calculator element chosen. Interfacing this device to a computer is quite complicated and requires the use of at least 5 or 6 additional cir- cuits. Table 2.3 lists estimates for the package count and cost of the cal- culator terminal using a calculator element as the CP. Such a system will probably contain between 80 and 120 integrated circuit packages at a cost ranging from $50 to $150. Various calculator elements are listed in Table 2.k showing the types of available arithmetic operations. Device Packages Cost Calculator Element 1 or 2 $10 - 75 Key circuit 20 - 30 10 - 20 Display circuit 20 - 30 10 - 20 Calc ■> Comp Circuit 20 - 30 10 - 20 Comp -> Calc Circuit 20 - 30 10 - 20 Estimates of Package Count and Cost for a Calculator Terminal Design Utilizing a Calculator Element. Table 2.3 18 Mfg. Type # Digits Decimal Point Functions Mostek Mostek Mostek Texas Inst . Texas Inst. AMI MOS Tech. MK 5013 MK 50lU MK 5010P MK 5012P TMS 0100 TMS 0117 S 21UU MPS 2525 MPS 2526 12 10 10 8 or 10 10 10+ 2 exp floating floating floating floating floating floating scientific notation +, -, *> *, M _ * _ * » INC, DEC j y 1 i — v/x, x^, l/x, M, it, e x ARC, SIN, COS, TAN, LN , LOG Examples of Commercial Calculator Elements and Their Characteristics. Table 2.U 2. 5 Comparison The discussions in this chapter have examined the possibility of using microprocessors and calculator elements as the CP of the calcaulator terminal. Several problem areas encountered in both processor types have been discussed and tentative solutions have been given. At the conclusion of each investigation, an estimate was given of the package count and cost associated with the design. Table 2.5 summarizes these estimates and enables a comparison to be easily made. Operations Package Count Cost Microprocessor Microprocessor Calculator Calculator + _ * ±. all + - * 4 all ko 1+0 80 - 100 80 - 120 $270 $1+50 $50 - 70 $70 - 150 Comparison of Package Count and Costs for a Calculator Terminal Design Utilizing a Microprocessor or a Calculator Element. Table 2.5 19 Three conclusions can be made from the data in Table 2.5- With regard to the microprocessor design it is apparent that the package count is not directly related to the complexity of the operation set. It is ob- vious that microprocessor implementations cost about five times more than cal- culator element implementations. However, microprocessors can be designed with less than half the number of packages needed in a calculator element de- sign. The initial calculator processor requirements specified a low cost, portable device which is capable of solving simple arithmetic problems. Clearly, both of the processor types can meet the last requirement. It is only in choosing a low cost processing element, which can also be made por- table, that a conflict arises. Since it is only intended to demonstrate the feasibility of such a device, it was decided to relax the portability require- ments and use the least expensive processor type - the calculator element. Indeed, an IC manufacturer might conclude that a microprocessor design would be the least expensive for high volume production. Hence, the decision is somewhat biased since only a prototype has been constructed at this time. Referring to Table 2.k and 2.5 it is noted that a design using a highly sophisticated calculator element can be realized as easily as one using a less powerful element. The processing element which was chosen for the cal- culator terminal is the MOS Technology MPS 2525/2526 calculator array. 20 CHAPTER 3 THE CALCULATOR 3.1 I ntroduction The processing unit used in the calculator terminal is the MOS Tech- nology MPS 2525/2526 calculator array. The CP consists of two 28-pin DIP packages utilizing low threshold voltage PMOS technology. The unit does not require an external clock and operates from two power supplies. Several topics will he discussed in this chapter pertaining to the operation and implementation of a stand-alone calculator using the MPS 2525/ 2526 processor. A brief description of the mathematical operations and problem format will be presented to clarify the processing capabilities of the calculator. Also considered is the circuit design of a simple stand- alone calculator using only a keyboard, display, and processor. 3.2 Functional Description The calculator operates in a scientific algebraic format and is -99 capable of handling operands with an absolute value between 1 x 10 and (10 - 10 ) x 10 . Entry numbers or result data falling outside this range cause an overflow, which results in an error message on the display. The display consists of fourteen digits which are used to indicate currently entered numbers or computational results. Included in the display are a mantissa sign, ten digits of mantissa, an exponent sign, and two digits of exponent in the following format : MAN SIGN MAN 9 MAN 8 MAN 7 MAN 6 MAN 5 MAN k MAN 3 MAN 2 MAN 1 MAN EXP SIGN EXP 1 EXP Display Format of the Calculator Terminal. Figure 3.1 21 Input numbers are displayed exactly as the keys are depressed. Result data is represented in floating point notation (exponent of 0) if possible, other- wise the representation consists of a mantissa between 1.0 and 9-999999999 in conjunction with an exponent. A special character, T, appears as the mantissa sign in the event an overflow or illegal operation occurs. Data entry is accomplished in one, or possibly two phases. The first such phase occurs when entering the mantissa. The first ten digit key depressions are entered into the calculator as the mantissa, the eleventh and successive digit entries are ignored. The decimal point /~«7 and change sign /CHS/ keys may be entered at any point during the mantissa input stream. The second phase is optional and only occurs when the enter exponent key /EEX/ is depressed. During this phase two digits of exponent may be specified. A / CHS/ entry while in this mode will negate the sign of the exponent. At any point in either of the two phases a clear entry key /CE/ will void the number currently being entered. Other data stored in the unit is not affected by this action. The CP contains an x and a y register which are used to store operands, The x register is permanently connected to the display and is used to hold operands during entry and result data upon completion of execution. The y register is not directly accessible by the operator and must be transferred to the x register for manipulation. The instruction set of the calculator processor can be divided into four classes: double operand, single operand, control, and miscellaneous as listed in Table 3.1. 22 Double Operand Single Operand Control Misc. + SIN, ASIN — M - COS, ACOS CL, CE IT * TAN, ATAN (,) x:y T LOG, ALOG LN, ALU o/R Y X 1/x, /x, x 2 , e x Operation Set of the CP. Table 3.1 Double operand instructions include +, -, *, v, and Y . Expressions may contain one or more such instructions in the following format : (number) (d°i) (number) ... (number) (= ) where doi indicates a double operand instruction. Execution begins when either the equal sign is entered or a second double operand instruction is specified. In either case the x and y registers con- tain the same result upon completion. Single operand instructions include SIN, COS, TAN, LOG, LN, l/x, x 2 /x, e , and x . The inverse functions of the trigonometric and logarithmic instructions are also available. The instructions operate on the number con- tained in the x register under the following format: (number) ( so: where soi indicates a single operand instruction. Execution begins im- mediately after entering the instruction. The result is placed in the x register and the y register is unaffected. Equations containing a mixture of single and double operand instruc- tions may be evaluated: a EJ b /SIN7 Z±7 c BT] EJ produces: a - SIN b + /c 23 Parentheses may also be included in the expression to force the evaluation of a subexpression. Up to two levels of parentheses nesting are allowed: /i7/i7^7/gii7/^7 R £7 derives : SIN I 7(a + b) C - (d + e) f The control keys consist of: = , CL, CE, (,), and o/R, which are used to specify to the calculator how a particular problem is to be evaluated. The =, ( ,and ) keys alter the normal sequence of instruction execution as explained earlier. The /CE/ instruction voids a number which is currently being entered as opposed to the /CL/ command which resets the calculator and clears all registers. /CL/ is the only command the machine will accept after an error has been made. The /b/R/ key selects the units of the operands which are used for trigonometric functions. Three keys, tt , M and x:y are provided for entering prespecified data into the x register. The /n7 command deposits the number 3.1^-159265^. The /M/ instruction is used to access or store information into a memory register. The interpretation of this command is context sensitive. Entering the /M/ command in the midst of an expression causes the memory number to be deposited into the x register. Conversely, entering the /M/ command after an equal sign causes the number in the x register to be stored in M. Lastly, the /x:y/ command interchanges the contents of the x and y register. 3-3 The Calculator Circuit The calculator circuit contains a calculator processor, a display and a keyboard. Using these three elements, a stand-alone calculator can be con- structed with the capabilities previously discussed. This section examines 2k the operation of the fundamental stand-alone calculator. An understanding of these principles is essential in the development of the interface circuitry. As mentioned earlier, the pin restrictions imposed upon calculator processing elements have made it necessary to perform I/O through a set of multiplexing, segment, and keyboard lines. The calculator processor of concern here has fourteen multiplexing lines called DIGIT LINES which are referred to as D , D p , D_ ... D ,. Figure 3.2 illustrates the waveforms present on each line and clearly shows that at most one D line is active at a time. Each pulse indicates that a n * particular piece of data can he found on the segment or keyboard lines. In the waveforms shown, a DIGIT TIME is defined as the interval of time between a positive edge on D and a positive edge of D _ . this value is llUO + 20 = r ° n * n+1 ll60 ys . A CYCLE TIME is the time required for a complete cycle through all fourteen digit lines ; lk x ll60 ys = 16.25 ms. These signals will be used throughout the interface design to synchronize the calculator terminal with the CP. The segment lines specify which segments of the nth digit are turned on during the nth digit time. The data present on these lines is updated during the 20 ys period between actual digit line pulses. Figure 3.3 illustrates this circuit for one of the fourteen digits of the display. Electrical properties of the digit and segment lines, which will determine the characteristics of the drivers, will be discussed later. The keys are electrically located at the intersection points of a lk x 3 matrix. The digit lines form the matrix columns as shown in Figure 3.^-. Pushing a key located on the nth column causes the waveform of the nth digit line to appear on one of the row lines. This information is used to determine exactly which key was pushed. The calculator is equipped with circuitry to detect multiple key depressions and contact bounce. 1.1ms 10ms 25 At 15.414 ms Dx D 2 i I i Dl4 J L r Waveforms Present on the Digit Lines Figure 3.2 LEDS DIGIT LINE Equivalent 7 - Segment Circuit for One Digit Figure 3 . 3 26 3.U Stand-Alone Calculator The calculator, as described in this chapter, provides the operator with a large selection of operations which may be used to solve equations in a stand-alone mode. The circuit is rather simple to realize and consists of only three devices as shown in Figure 3-5- Consideration can now be di- rected toward designing a circuit to interface the calculator to a computer. 27 DIGIT LINES Di D 2 D 3 D 4 D 5 D 6 D 7 D 8 D 9 D l0 D n D l2 D 13 D 14 I If X X X I I' ^ o ££ T V CE \XY SIN * cos T T T T TAN VCHS V.EEX VARC V IT £ V ROW LINES — ^ U-06 U_N Keyboard Matrix, Figure 3.^ DISPLAY A lz KEYBOARD C SEGMENT DATA DIGIT LINES KEY ROW LINES > CALCULATOR PROCESSOR CP Block Diagram of a Stand Alone Calculator. Figure 3-5 28 CHAPTER k SYSTEM DESIGN It was previously determined that the calculator terminal provides the operator with two computing modes with which to solve a wide variety of problems. The calculator, or stand-alone, mode is effective for evaluating simple mathematical expressions which do not require programming features. Problems which fall outside the capabilities of the calculator terminal may be solved by reconfiguring the system to include a computer. Reconfiguration occurs on command from the operator through a mode selector switch and is accomplished by controlling data transfers between the display, keyboard, CP, and computer. This chapter describes a method which may be employed to enable a configuration of the system which is compatible with the user selected mode. A definition is first presented of the various types of data paths which the system may require in certain instances. k.l Types of Data Paths Operation of the machine in the stand-alone mode necessitates data transfers between the CP, display, and keyboard. Information is entered into the system when the operator strikes a key and the corresponding key code enters the CP. Information processing is performed in the CP and result data is transmitted to the display and ultimately to the operator. The CP must be allowed to accept key information and output result data on the display; indicating that a functional keys -*■ CP and CP -*■ display data paths are necessary. When the calculator terminal is operating in the stand-alone mode, the CP is able to use the keys and display as I/O channels. At no time Is the CP allowed to reconfigure the system. 29 Several additional data paths must be included when a computer is introduced into the system. It is necessary for the computer to accept in- formation from the functional keys and output result data on the display. Otherwise, the computer would not have access to the I/O channels. In addi- tion, the computer should also be provided with some means of accessing the CP so that shared processing can occur. This requires that the computer be able to enter data into the CP and obtain results. The four new data paths needed to enable the basic operation of the calculator terminal in the com- puter mode include: computer -> CP, CP ■> computer, computer -> display, and functional keys -> computer. These data paths are indeed fundamental to the computer mode of operation. However, they fail to provide the operator with a mechanism for directly controlling the computer. During computer interactions the operator will be required to specify subroutine numbers, enter keyboard parameters, and control the execution of programs. All of these actions involve the direct transmission of control information from the operator to the computer. The present calculator input mechanisms would require that the operator enter a response on the functional keyboard, known to both the CP and the computer (e.g. SIN, M, ., +...). Ob- viously, this will result in ambiguous key interpretations, that is, a key's definition will be a function of the state of the computer. Such a situation is obviously undersirable , a better solution being to add a small number of keys to the calculator terminal for controlling the computer. The set of keys available to the operator then becomes the union of all functional keys and all control keys. A new data path, control keys -*■ computer, transmits the control key information directly to the computer. The exact number and definition of the control keys should be suf- ficiently general to enable the efficient control of the computer and 30 subroutines. Six keys, governing different phases of the computer operation, can provide the operator with the necessary control capability: - call computer - enter subroutine number - enter subroutine parameters - output next result number - abort the subroutine - halt computer interaction and return to stand-alone calculator mode. In an analogous manner, the operator will often need to know the state of the computer. Operator responses such as entering subroutine parameters or specifying subroutine numbers are dependent upon this knowledge. Obviously, the display could be used to inform the user of any actions necessary on his part. However, the problem remains that this type of information, when pre- sented on the display, might be confused with numerical result outputs. As in the case of the keyboard, the best solution is to provide a different output mechanism to transmit information of this type. The method selected employs a set of status lights to indicate the state of the computer and whether or not any action is necessary on the part of the operator. The computer ■> status light data path is necessary to acti- vate the lights. As before, the definition of the status lights should be sufficiently generalized to indicate the state of the computer under most cir- cumstances. Six lights, indicating the computer's status and requesting operation: - enter subroutine number - enter parameter data - input data error - execution error - subroutine finished - output data valid Eight types of data paths have been examined and discussed up to this point. The completed system in Figure k.l illustrates the three closed-loop information paths between the operator, CP, and computer. The following 31 Three Closed-Loop Information Paths Made Available with the Computer/Calculator Terminal Pair. Figure k.l 32 numerical types are assigned to the various data paths to assist in future discussions : la - CP ■*■ display- lb - computer -*■ display 2 - functional keys ■*■ CP 3 - function keys -*■ computer k - control keys ■> computer 5 - CP •*■ computer 6 - computer ■*■ CP 7 - computer ■* status lights k.2 Control of Data Paths As the calculator terminal enters the computer mode of operation, the system must reconfigure as determined by the software. It was mentioned earlier that reconfiguration is achieved by controlling the flow of information along the data paths indicated in Figure k.l. Data control modules may be placed in a data path to regulate the flow of information. In general, data paths which transmit computer generated in- formation should not be interrupted by a control module. It is only data produced by the operator or the CP which must be regulated. The exact place- ment of the modules will now be examined as related to each type of data path defined earlier. Type 1 - Display Data The type 1 data path pertains to output information, generated by the computer and the CP, which is directed to the display. The CP output data is in the form of an 8-bit segment code and may be transferred directly to the display. Computer output information is BCD encoded and stored in a small RAM within a logic network. The BCD must be 7-segment encoded prior to transmission to the display. Clearly, result data from the CP (type la) is allowed to enter the display when the calculator terminal is operating in the stand-alone mode. 33 However, either processing element may output data when the machine is under program control. Hence, a data selector module is required to allow one, and only one source of display information. The subsystem of Figure U.2 indicates how the display network is de- signed using an 8-bit data selector module. The display select (DS) control line is provided so that the source of display data may be specified. Types 2 and 3 - Functional Key Data Types 2 and 3 data transfers are used to enter functional key infor- mation into the calculator and computer respectively. It will be recalled from Chapter 3 that functional key information which is entered into the CP consists of digit line waveforms present on one of three row lines. Trans- mitting this information to the computer is slightly more complicated since the column and row location of the key must be encoded. Using a lU x 3 key- board matrix implies that a 6-bit key encoding is required before transmis- sion to the computer can occur. When the calculator terminal is operating in the stand-alone mode it is necessary for the key information to be entered into the CP. When computer interactions are desired the functional key data can be transmitted to the computer, the CP, both, or neither as determined by the software. The subsystem shown in Figure k.3 illustrates how the control modules are placed to regulate the flow of functional key information. The enable functional key ->■ CP (EFKC) control line is provided to control the 3-bit key entries into the CP. Similarly, the enable functional key output (EFKO) control line regulates the flow of 6-bit key data to the computer. Type h - Control Key Data Type h data transfers were defined as the flow of control key infor- mation to the computer. It would be convenient to locate these keys on the FROM COMPUTER > C> MEMORY AND LOGIC =0 BCD TO 7-SEGMENT ENCODER DS DISPLAY SELECT Display and Display Selector, Figure k.2 3U DISPLAY 7Y FROM CP TO COMPUTER CP EFKC FUNCTIONAL KEYBOARD c> TO CP Control of Functional Key Information. Figure k.3 35 same Ik x 3 keyboard matrix used for the function keys. Figure 3.^+ shows that several locations on the matrix may be used for this purpose. However, the task of distinguishing a functional key code from a control key code be- comes quite complicated if the control keys are placed at these locations. The same advantages can be retained, with easily distinguishable key codes, if a fourth row is added to the matrix. The control keys could then occupy any of the fourteen positions in the fourth row of the ik x k matrix. The key code of a control key would then consist of an encoding of the column location and row location of the key. As in the case of functional keys, a 6-bit code is required to specify the key. The control key data path is not operational when the stand-alone mode is selected for the calculator terminal. It is only during computer interactions that the data path may be activated, and even then, it is done so at the direction of the software . The subsystem shown in Figure h.k is incorporated into the calculator terminal to regulate the flow of control key information to the computer. When the enable c_ontrol key output (ECKO) line is activated, the 6-bit key data is allowed to pass to the computer. Type 5 - CP to Computer Data To facilitate shared processing, the type 5 data path is required to allow CP result data to be transmitted to the computer. A simple control module will not suffice in this instance due to the complex nature of the data involved. It will be recalled from Chapter 3 that the CP produces a fourteen digit result in a serial manner and that these results are T-segment encoded. Hence, a logic network is required to decode the information into the BCD code prior to transmission. Furthermore, the logic network must in- sure that the digits are transmitted in the proper order. A minimum path width of four bits is required to output the BCD information. 36 TO COMPUTER < KEY CODE ENCODER c ENABLE ECKO CONTROL KEY OUTPUT CONTROL KEYBOARD Regulation of Control Key Information into the Computer, Figure k.k TO COMPUTER < ECRO 1 ENABLE CP RESULT OUTPUT CP RESULT OUTPUT LOGIC 7-SEGMENT ENCODER TO COMP < -L UTER ^ST CP RESULT OUTPUT LOGIC FROM ^K ££ :OMPUTER- ) l^ z 5 in -i cr o uj cr CO o uj a cr ECRO 7-SEGMENT TO BCD DECODER DS EFKC EFKO ECKO COM FROM f— -^N mputerJ \S KEY CODE DECODER load display number data - LCR -*■ load control register data - LCI -> load CP input data The process terminates with a clear signal to the UART to reset the receiver and enable further receptions. The calculator terminal shown in Figure k."J indicates that two output channels are required to transfer data to the computer. Since the transmitter portion of the UART is only capable of accepting one eight bit set of data, it is necessary for a multiplexing network to monitor the operations of each channel. Figure 4.9 shows the multiplexing subsystem which is incorporated into the calculator terminal. The network receives two sets of data and a ready signal from each of the output channels: -CRR - CP result data ready -KDR - Key data ready The network transfers the two sets of data onto one output bus and activates 1+1 an output data ready (ODR) control line. The transmitter portion of the UART accepts the output data in a parallel manner and begins transmission upon receipt of the ODR command. h.k Summary of System Design Figure U.10 shows the completed functional diagram of the calculator terminal. The system has all of the capabilities discussed earlier. The computer software is written to accept inputs from, and generate output to, the six I/O channels shown in the figure. The remainder of the thesis describes the circuit design details as related to each of the subsystems listed below: 1 - CP circuit 2 - display and display selector module 3 - keyboard, key enable modules h - computer -> CP logic 5 - computer ■*■ display 6 - output data multiplexers, keycode logic T - status lights, control registers 8 - UART, input data demultiplexers U2 COMP FROM ( Ts^ UTER J k^ UART RECEIVER n IDR CLR LOGIC ADDRESS DECODER ITTT v -i z a. — INPUT DATA BUS °? 9 o " UART Receiver Network, Figure 1+.8 TO COMPUTER KEY DATA UART Transmitter Network, Figure h.9 U3 ^rVl/^ o r . a l: iii in K a o 15 O D 111 U o to x m i ui A z o o: u U III 3 CD O 13 O UJ uj CO O o I •- to to 3 H K X < 19 K to -1 A" Q o A V 2 => ° - S Q ui 8 o ^ S o UI P=^ K s > < w u A" Iz < ifl •H s EH o -p cd H pi o H a5 O -p 0 •H V kh CHAPTER 5 IMPLEMENTATION Based upon the design concepts presented in Chapter h a more detailed description can be given of the circuits used to implement the calculator ter- minal. It is not the intention of this chapter to describe the purpose of each individual integrated circuit but rather to discuss some of the more dif- ficult design problems and how they were solved. 5 .1 The Calculator Processor The circuit of Figure 5.1 illustrates the calculator processing ele- ment and the logic circuitry used to generate the control signals. The cal- culator segment lines ( CS ) provide the only meahs of accessing CP result data, while the calculator row lines (CR ) enable key information to enter the CP. Both of these functions are dependent upon the digit lines (D ) . In order to synchronize the interface with the CP it would be desir- able to have access to the clock signals generated by the CP. Since these signals are internal to the CP chips it was found necessary to externally generate the clock signals through the use of the digit lines. An array of fourteen diodes, connected to each digit line, generates the waveform shown in Figure 5-2a. A digit end p_ulse (DEP), Figure 5-2b, can then be generated as the main synchronizing signal for the entire calculator terminal. This same waveform also enables the generation of a cycle end pulse (CEP), as shown in Figure 5- 2c, which can be used to reset the interface. Similarly, the _digit data pulse (DDP) indicates that valid CP result data can be found on the segment lines. The last clock signal to be considered is the decimal point pulse (DPP). This line provides an indication of the internal state of the CP ^5 CONTROL CLOCK LINES § % CALCULATOR SEGMENT LINE* oooouooo CALCULATOR ROW LINES K» > n 00000000 U6 J E 6 I (A E E J d «A eg Q - - -- Q O CM id a. UJ Q CM iri a. Q Q a. UJ o u CM in en H aJ bO •H CO M V o H O a) (L) -P ^ a (U o o EH m CM •H hi (i.e. executing or display). The absence of a DPP between any two CEP's indicates that the CP is currently executing an instruction. Hence, the next DPP can be interpreted as a "signal done" from the CP. It was learned that pin 10 on the MPS 2525 package can also be used as a "signal done" from the CP. Unfortunately, this feature was discovered too late for inclusion into the system described here. 5.2 Display, Drivers, and Display Selector A fourteen-digit , seven-segment display provides the only means of output for the computer and the CP. As shown in Figure 5-3, the circuit employs an array of transistors to drive each segment and digit. The digit drivers are controlled by the fourteen CP digit lines while the segment drivers are activated by the selector network. The selector network accepts two sets of segment information and selects one to send to the display as determined by the state of the display select (DS) control line. As shown, the CP segment data must first be con- verted to TTL compatible signals to enable its use in the selector. The CP data is also converted from the seven-segment form to the BCD code in order to accomplish transmission to the computer. 5.3 Key Input Decoder The network of Figure 5«^ illustrates the circuit used to enable the computer to enter information into the CP: computer ■* CP When the computer desires to enter data into the CP it transmits an 8-bit code to the calculator terminal: 00RRCCCC 1*8 COMPUTER SEGMENTS 0000 0000 o w H H < z -J UJ 3 Z o ta -I UJ < O -P o 01 H -clI> i -o g s- in w K UJ 1 Z -6>- -O- -0- -0- -0^ -&>- -O « -l>- -&>- -& <-) -{^ in 00 0000 ^9 u 0) o CJ 0) o o o !>> -3- •H En 0000 t- < c/> 3 5 UJ £«* 50 The first two bits, 00, specify that the data is intended to be used by the key input decoder. This causes a load key data (LKD) pulse which activates the circuit of concern here. The next two bits, RR, are decoded into row signals, KRC , for use in the final information entry into the CP. Similarly, the last four bits, CCCC, are decoded into column signals, KCC . n The column signals, in conjunction with the row signals, uniquely specify a key on the keyboard matrix. The enable processor ■+ CP (EPC) informs the keyboard that the computer is entering data. The fourteenth column is used to provide a means for the computer to reset the calculator terminal. 5. k Keyboard and Key Output Control The network of Figure 5-5 governs the flow of control and functional key information into the CP and the computer. The data paths of concern in- clude : computer -* CP EPC functional key ■*■ CP EFKC functional key -*■ computer EFKO control key -*■ computer ECKO The KRC and KCC lines specify a key which the computer desires to enter into the CP. This action is accomplished by saturating a transistor across the terminals of the key. Note that row 3, which contains only control keys, cannot be activated in this manner. Functional key information is entered into the CP when either the EPC or EFKC control lines are active. Key information which is to be sent to the computer is debounced and transmitted upon activation of the key output ready (KOR). The key data is encoded into a row and column specification of the key's location: 0, 0, KC , KC^, KC 3 , KC 2 , KC^ KC Q 51 a) u & •H En 52 5.5 Display Input from Computer The computer transfers information to the display in a digit serial manner involving fifteen individual transmissions of 8-bits: llffdddd The first two bits, 11, indicate that the data is to be interpreted as display information, this causes activation of the load display _in format ion (LDl) control line. The ff bits are used to specify the action to be taken by the network of Figure 5-6. When ff = 00 the circuit resets and interprets the dddd bits as the decimal point position and dddd is loaded into a 1j— bit latch. The next thirteen transmissions will have ff = 01. This causes dddd to be loaded into one word of a k x l6 RAM and used as part of the numeric display. The last transmission, fifteenth, has ff = 10. In this case the dddd bits are loaded into the RAM, completing the transfers and the network is allowed to output the data it has sotred. The process of data output involves a constant read cycle through the RAM. A U-bit BCD code is gated to the 7-segment encoder when the correct digit line appears. This occurrence is determined by an address counter con- trolled by DEP and CEP. 5.6 CP Result and Key Output The network of Figure 5-1 governs the flow of all information to the computer. The data types of concern here include: CP ■> Computer (ECRO) keys -> Computer (EKO) The key code data is gated onto the data out bus (CO ) upon reception of a key output ready (KOR) signal from Figure 5.5- KD and KD, are accepted externally while KD through KD are generated by an internal counter. 53 o. II 8 o u $ u ft CD S -P H ft cd o H O ft CO •H O vo CD 3 & •H INPUT DATA BUS 5^ 00 00 0000 * m <\j -i Q Q Q Ci u o o o (D ID ID CD o o 55 The transmission of the CP's result data occurs upon reception of a CPC signal and involves fourteen separate 8-bit transmissions. The format of the data involved is: OOepdddd At the nth transmission, the dddd bits represent the BCD encoding of the nth digit, p is high if the decimal point appears in the nth digit. e is activat- ed if n = lU , signaling the end of transmission. The network also transmits an 8-bit word if the CP_ wait (CPW) control register is set. The action here is to inform the computer that the CP is ready to accept a command; hence the data bits are unimportant. All of the above transmissions occur only if the transmitter buffer register is empty (TBRE) and the DPP clock is on. The transfer begins when the circuit activates a transmitter buffer register load (TBRL) signal. 5 • 7 Control Registers and Status Lights The network of Figure 5-8 is concerned with the control registers and status lights: computer ■+■ control registers computer ■*> status lights Input data from the computer is loaded into the control registers if the first two bits transmitted are 01: Oldddddd causing an active value on the load _control registers (LCR) control line. Similarly, a 10 on the first two bits activate the load status lights (LSL) control lines : lOdddddd In both cases the d bits are loaded directly into the associated flip-flop . 56 a Ull z H®- H& <1 — Wv— 1 -3 WV-. < *t-l «f I I Ai>- -©- <3-n I p. ^@H £ ° " - o oo -<& «8- «n— 1 Jh» -& -4 I I - o qo DISPLAY SELECT ENAB. FUNCTIONAL KEYS -»-CP £ O- - O K ENAB- FUNCTIONAL KEY OUTPUT ENAB KEY OUTPUT ENAB. CONTROL KEY OUTPUT ENAB. CP RESULT OUTPUT K <3- CO u •H <->(/> « = < Q. 5 => z S in 57 5.8 Transmitter and Receiver The last circuit to be examined coordinates the I/O between the com- puter and the calculator terminal as illustrated in Figure 5-9. The transmitter portion of the UAET accepts data from the data out bus when TBRL is activated. The completion of the transmission is signaled by the TBRE line. Upon reception of an 8-bit word from the computer, the network shown will decode two of these bits into a load pulse LKD, LCR, LSL or LDI as dis- cussed earlier. The network also provides an initialization pulse (INIT) which is used to reset the entire system upon power-up or a mode change. 58 > > o _ in z -< ♦ O i 0- 0- Hi- * 7 & (U •P -P •H -O •H o H> r*H O -O o r -o o O -I -O * r^H I — wv— I I — wv — I r^ I — m — I -o 8 o -O Q z V 1 — * 9 n _J tHi. — So _ -. :«a •;■- «> o - Hi- — 3 CP (via functional keys and display) user <— > computer (via control keys, status lights, display) computer <— > CP (via functional key, control registers, CP output) Obviously, the same information loops must be implemented regardless of the nature of the CP. An examination into the possible employment of a microprocessor was conducted in Chapter 2. It was found that while this type of CP would yield a minimal package count, the associated costs were too high for initial design work of this nature. However, if this is not a problem, or if the calculator terminal were to be made portable, it would be recommended that this alter- native be re-examined. The data paths mentioned earlier would also be imple- mented in the new design. Only the design details (I/O with the CP) would differ from a calculator terminal design utilizing a commercial calculator element as the CP. The design details of the system implemented here are obviously a function of the characteristics of the calculator element selected for use as the CP. However, it is not felt that this dependency is critical. As recalled from Chapter 2, most of the calculator elements examined accomplished I/O in a similar manner - via multiplexing, segment, and keyboard row lines. Any design using a different calculator element as the CP must include a method for obtaining results from the multiplexed segment lines and entering information by simulating key pushes. The number of multiplexing and 67 keyboard row lines is the only variable of question in this case. Hence, the width of the data paths is the only important parameter. 7 .k Performance Enhancement This thesis introduced the calculator terminal concept which involved the design of a stand-alone calculator which could be interfaced to a computer to facilitate shared processing or remote I/O capabilities. Although the machine was shown to be operational, it would be of benefit to discuss a few modifications which may enhance the overall performance. Three areas can be itemized as topics of this discussion: - increased speed - decreased cost (fewer IC's) - increased capabilities The characteristics of the calculator terminal are identical to those of the CP when the machine is in the calculator mode of operation. Hence, it is chosen to limit the discussions to performance enhancement when the machine is operating in the computer mode. 'J.h.l Speed Considerations Perhaps the largest single problem associated with this design is the rather slow speeds of information transfers between the computer and the cal- culator terminal. The design requirement of using the device in place of a teletype terminal implies the use of a rather slow data transfer rate of 110 baud - one transmission every 100 ms . With this rate of transmission the following time periods can be derived for the various data paths: 1 - computer -> display 1500 ms 2 - computer -> CP l600-l8U6. 4 ms 3 - computer -*■ control registers 100 ms h - computer ■*■ status lights 100 ms 5 - keys ■> computer 100-115.*+ ms 6 - CP -*■ computer lU00-l6l5.6 ms 68 Data transfers listed as items 1, 3 and k are not dependent upon the CP or CP generated clock lines. Hence, the times associated with these trans- fers are directly related to the period of the transmitted word. Obviously, the overall system speed cannot be increased by modifying these subsystems. The reamining items, 2, 5 5 and 6, are dependent upon the operating clock frequencies of the CP. An increase in speed may be accomplished through correct alterations to these networks. However, this can only be done at the cost of increasing the baud rate. When entering data into, or obtaining results from, the CP , the inter- face circuitry must be designed to accommodate the 1.1 ms period of each digit line and the 15-^ ms digit cycle time. When the computer enters key information into the CP it should acti- vate that key long enough for the CP to recognize and debounce the key entry. Obviously, this time must be greater than one digit cycle, otherwise the CP might not be aware that a key was pushed at all. However, pushing the key for only one digit cycle will only guarantee that one digit pulse is transferred to the keyboard row lines and into the CP. A better design practice would be to push the key for at least two or three digit cycle times, about 30.8 ms, and hope that the CP does not debounce all of the information. In a similar manner transfers from the keys to computer, and the CP to the computer, are dependent upon the digit cycle time. The maximum speed at which CP result data may be transmitted to the computer is one digit every 15. U ms for a total transfer time of 215.6 ms. Assuming that the transmission rate can be increased, the following time limits may be given for the various data paths: computer -> display - computer ■> CP 2h6.k-k92.Q ms computer ■> control registers - computer -> status lights - keys -> computer 15 • ^+-30. 8 ms CP -j. computer 215-6-531.2 ms 69 The above rates assume a transmission time of 15.^ ms per word implying a transfer rate of about 715 baud. The system may also be speeded up by selecting a calculator processor with a faster cycle time. 7 . h . 2 Simpler Design The calculator terminal system described in this thesis was intended to be general enough to enable a large amount of software flexibility. Two of the data paths included in the initial design may be omitted in some applications if a decrease in software flexibility can be tolerated. A 15- 20% decrease in the number of integrated circuit packages may be accomplished in this manner, reducing the total package count of the system to about 70. One of the data paths which may be considered for elimination is: functional keys -*■ computer Normally the computer will only be required to accept numeric key entries since the remaining keys (+, 1/x, = , ...) are usually entered directly into the CP. The functional key ■+ CP ■* computer data paths would then provide the necessary information transfer. In an analogous manner the computer -*■ display data path may be re- placed by a computer •* CP -*■ display path. A large number of IC's are elimi- nated in this case. A further advantage is that the CP could be used to format the numeric output. Hence, the tasks of blanking leading or trailing zeros, and normalizing numbers need not be performed by the software. In addition to these major revisions a future design may reduce the package count a little further by minimizing gates and similar SSI circuits. 7.^.3 Increased Capabilities The capabilities of the calculator terminal can be greatly increased by including three additional components into the design. TO The present system is greatly limited by the fact that alphanumeric and hard copy outputs are not available. Including such features on future designs would enable the output of character strings. Also, the sometimes annoying task of writing down the CP result data could be eliminated through the use of a printer mechanism. At the present time the operator is required to write the programs on punched cards or some other medium away from the calculator terminal. The addition of a few keys to the keyboard matrix could resolve this problem by providing the operator with a full alphanumeric keyboard. 71 REFERENCES 1. Intel Corporation, From CPU to Software , Intel Corporation, Santa Clara, California, 19lh. 2. Morris, R. L. , and Miller, J. R. , Designing with TTL Integrated Circuits , McGraw-Hill Book Company, New York, 1971- 3. MOS Technology, Specification for Scientific Calculator Arrays (MPS 2525- 001, MPS 2526-001) , MOS Technology, Norristown, Pennsylvania, 197^- k. Texas Instruments Inc., The TTL Data Book for Design Engineers , Texas Instruments Inc., Dalas, Texas, 1973. 72 APPENDIX PROGRAM EXAMPLES Two program examples are listed in the following pages to illustrate the types of routines which may be executed through the calculator terminal. Type 1 Program The first type of program consists of a key pushing routine which is used to evaluate a compound interest equation. The input parameters include 1 - principal .< principal 2 - annual interest rate v < interest 3 - number of monthly payments < # payments which are used to find: 1 - amount of each monthly payment 2 - total of payments 3 - total interest The equation which is solved is: k * P amount of each payment A = — 1 n where: P = principal k = — * T-r— ; I = annual percentage interest rate n = number of monthly payments The flow chart of the routine is given in Figure A.l. 73 r CALCULATE A 1. I 7. K 13. 1/x 19. m 2. T 8. + Ik. 20. l/x 3. CONST 9. 1 15- M 21. • U. S 10. Y x 16. 1 22. K 5. K 11. N IT- - 23- • 6. CLR 12. S 18. M 2k. P A ■*■ calc CALCULATE TP 1. A 2. * 3. N 1*. = TP ■"- calc CALCULATE TI 1. TP 2. - 3. P 1*. = TI calc Flow Chart of a Key Pushing Routine. Figure A.l 71* 983 7154 PI .BLKB 30,. 984 7212 At .BLKB 30, 985 7250 TPl .BLKB 30, 986 7306 TU . .BLKB 30, 987 7344 016 CONSTi • BYTE; 16,0,0,0,0 968 .EVEN 989 7366 II .BLKB 30, 990 7424 Nl .BLKB 30,, 991 7462 Kt .BLKB 30, 992 1 993 7520 012767 PR0G2I MOV *2,P3TAT 994 7526 012767 MOV #2,JSTAT 995 7534 312767 MOV *2,NSTAT 996 7542 004567 PINl JSR R5 f GET 997 7546 000002 PSTATt .WORD 2 998 7553 307154' i .WORD P 999 7552 301043 BNE: ERPG2: 1000 554 305767 TST TBIT 1001 560 303304 BGT UN 1002 562 356767: 813 IERR,P3TAT 1003 570 300764 BR PIN 1004 572 304567 IINI . JSR R5,GET 1005 576 000332 ISTATl • WORD 2 1006 600 007366' i • WORD I 1007 602 301327: BNE! ERPG2; 1008 604 305767 TST TBIT 1009 610 302334 BGEI NIN 1010 612 355767 BIS IERR,!3TAT 1011 620 300764 BR UN 1012 622 304567 NlNI JSR R5,GET 1013 626 300332. NSTATt .WORD 2 1014 630 007424' i .WORD N 1015 632 001013. BNEi ERPG2: 1016 634 305767 TST TBIT *P17 640 303434 BLEI NON 1018 642 122767 CMPB #23,N+13 1019 650 3C1435 BEQ 0K2: 1020 652 C56767 NONt BIS. IERR,N8TAT 1021 660 303760 BR NIN 1022 652 300237 ERP02t RTS PC 1023 664 004567 3K2;| JSR: R5,TE3T 1024 670 007424* • WORD N 1025 672 001317: BNEI IP03 1026 674 004567 JSR R5,D0< .MAIN. MACRO VB05C. 31-JAN-78 Mil© PACE' I* 75 ^027 700 007154* .WORD P 1028 702 0C0364* .WORD DIV 1029 704 007424* .WORD N 1030 706 007212* .WORD A 1031 710 004567 JSR R5, CLEAR 1032 714 007336* .WORD TI 1033 716 004567 JSR R5 r M0V 1034 722 007154* .WORD P 1035 724 007250' .WORD TP 1036 726 000167! JMp. PG2D0N 1037 1038 732 004567 IP0S| JSR R5,D0 1039 736 007366* .WORD I 1040 740 000364* .WORD OIV 1041 742 007344* .WORD CONST 1042 744 007462' .WORD K 1043 746 004567 JSR R5 r PUTKEY 1044 752 0C0340* .WORD CL 1045 754 004567 JSR R5,PUTNUM 1046 760 007462* .WORD K 1047 762 004567 JSR R5 f PUTKEY 1048 766 000356* .WORD PIUS 1049 77d 004767. JSR PCfCPWAIT 1050 774 004567 JSR R5,PUTKEY 1051 030 000302* .WORD ONE 1 1052 002 004567 JSR R5,PUTKEY 1053 006 000370' .WORD YTTX 1054 010 004767' JSR PCfCPWAIT 1055 014 004567 JSR R5 r PUTNUM 1056 020 007424* .WORD N 1057 022 004567 JSR R5 f PUTKEY 1058 026 000336* .WORD EQ 1059 030 004767 JSR PCfCPWAIT 1060 034 004567 JSR R5 r PUTKEY 1061 040 000372* .WORD INV 1062 042 004767 JSR PCfCPWAIT 1063 046 004567 JSR R5 r PUTKEY 1064 052 000336* .WORD EQ 1065 054 004767: JSR PCfCPWAIT 1066 060 004567 JSR R5 r PUTKEY 1067 064 000332* .WORD M 1068 066 004767. JSR PCfCPWAIT 1069 072 004567 JSR R5,PUTKEY 1070 076 000302* .WORD ONEl 1071 100 004567 JSR R5 f PUTKEY 1072 104 000360* .WORD MINUS: 1073 106 004767 JSR PCfCPWAIT 1074 112 004567 JSR R5fPUTKEY 1075 116 000332* .WORD M 1076 120 004767 JSR PCfCPWAIT 1077 124 004567 JSR R5 r PUTKEY 1078 130 000336* .WORD EQ 1079 132 004767: JSR PCfCPWAIT 1080 136 004567 JSR R5 r PUTKEY 1081 142 000372.* .WORD INV 1082 144 004767 JSR PCfCPWAIT 1083 150 004567 JSR R5 r PUTKEY 16 .MAIN. MACRO V0OBC 31-JAN-70 30U9 PAGE I* 1084 154 1085 156 1^86 162 1087 166 1088 170 1089 174 1090 176 1091 202 1092 206 1093 210 1094 214 1095 216 1096 222 1097 226 1098 230 1099 232 1100 234 1101 240 1102 242 1103 244 1104 246 1105 250 1105 254 1107 256 1108 260 1109 262 1110 264 mi 272 1112 272 1113 276 UH 300 1115 302 1116 304 1117 310 1118 312 1119 316 1120 320 1121 322 1122 324 1123 330 1124 332 1125 336 1126 340 1127 342 1128 344 1129 352 1130 1131 000362' 0G4767 004567 007462» 004567 003362' 004767 004567 007154' 004567! 000336' 0C4767: 004567: 000200 007212' 001347 004567 007212' 000362' 007424' 007250' 004567 007250' 000360' 007154' 007306' 004567 PG2D0NJ 237212' 0G4567 000304 O003J0 001323. 004567 007250' 004567 000304 300300 001313 004567 007306' 004567 000004 000303 001303 016767 300207 EXPQ2I I • WORD MULT JSR PCCPWAIT JSR R5,PUTNUM .WORD K JSR R5,PUTKEY .WORD MULT JSR PCCPWAIT JSR R5,PUTNUM .WORD P JSR R5,PUTKEY .WORD EQ JSR PCfCPWAIT JSR R5,GET • WORD 203. .WORD A BNEI EXPG2; JSR R5 f D0 .WORD A .WORD MULT • WORD N .WORD TP JSR R5,D0- .WORD TP • WORD MINUS • WORD P .WORD TI JSR R5 f PUTDSPi .WORD A JSR R5,GET .WORD 4 • WORD BNEI EXPG2, JSR R5,PUTDSP! .WORD TP JSR R5,GET • WORD 4 • WORD BNEi EXPG2: JSR R5 f PUTDSP! • WORD TI JSR R5 f GET • WORD 4 • WORD BNEI EXPG2: MOV PGFJN, STATUS RTS. ' PC 77 Type 2 Program A second type of program uses the computer's memory to search through files. The example provided is an inventory system of the 7^+00 series inte- grated circuits. The user may direct the program into one of three directions to per- form the desired function: 1 - Place an Order A - Given - type number - number of pieces desired B - Action - reduce inventory - back order parts if necessary - output the number of pieces shipped - output the cost of this order 2 - Update the Inventory A - Given - type number - number of pieces received - new price B - Action - updates inventory 3 - Inquire A - Given - type number B - Action - output number of pieces on hand - output number of pieces on back order - output current price per piece The flow chart of the program is given in Figure A. 2. 78 f START J GET FUNCTION UPDATE 'Mua. DECODE INQUIRE GET TYPE GET TYPE GET QUANTITY RECEIVED GET TYPE PUT QUANTITY ON HAND GET NEW PRICE PUT QUANTITY BACK ORDERED ADD QUANTITY RECEIVED TO QUANTITY ON HAND PUT PRICE SUB QUANTITY RECEIVED FROM QUANTITY BACK ORDERED ADJUST PRICE PUT QUANTITY ORDERED PCS. SHIPPED PUT QUANTITY ON HAND SUB QUANTITY ORDERED FROM QUANTITY ON HAND DEC. INVENTORY IF QUANTITY BACK ORDERED 100 PCS. THEN BACK \ «- 100 ORDER J COST = QUANTITY ORDERED ■ PRICE EACH COST « QUANTITY ON HAND • PRICE EACH PUT COST CLEAR QUANTITY ON HAND PUT COST A File Searching Routine. Figure A. 2 79 1132 1 1133 354 000000 USTi .WORD 000., 100 ,,0,022, ,081. rl00 ,,0,024. 1134 374 000002 • WORD 002. ,100 .,2,019. ,033,, r 100, ,,0,024, 1135 414 000094 • WORD 004., 100 .,0,024, ,005,, ,100 .,0,025, 1136 434 000006 .WORD 006,, 100 .,0,109. ,037, . 100 .,0,070,. 1137 454 000010 • WORD 008,, 100 .,0,026, ,039. .100 ,,0,027. 1136 474 000012 • WORD 010., 100 .,0,026. ,012. rl03 ,,0,050, 1139 514 000015: • WORD 013,, 100 •,0,065. ,016, . 100 ,,0,053, 1140 534 000021 • WORD 017., 100 i,B,051, ,020, .100 ,,0,021, 1141 554 000027 • WORD 023,, 100 .,0,051. ,025, .100 ,,0,050, 1142 574 000332: • WORD 026., 100 .,0,036. ,027, , 100 ,,0,042, }143 614 000036' • WORD 030,, 100 .,0,022, ,032, .100 .,0,032. 1144 634 000945: • WORD 037,, 100 .,0,045, ,038. r 100 ,,0,050. 1145 654 000350 • WORD 043,, 100 ,,0,022, ,042, .100 ,,0,097, 1146 674 000057 • WORD 047,, 100 .,0,142, ,048, r 100 ,,0,136, 1147 714 000062 • WORD 050., 100 .,0,024, ,051, .100 ,,0,036, 1148 734 000065 .WORD 053,, 100 .,0,019, ,054, , 100 ,,0,022, 1149 754 000074 • WORD 060., 100 .,0,019, ,070, r 103 ,,0,053. 1150 774 000110 • WORD 072., 100 .,0,030, ,073, .100 ,,0,042, 1151 014 300112 • WORD 074,, 100 .,0,043, ,075, .100 ,,0,064, 1152 034 000114 • WORD 075., 100 .,0,036, ,080, .103 ,,0,058, 1153 054 000121 • WORD 081,, 100 .,0,197, ,032,, .100 ,,0,130,. 1154 074 000123 • WORD 083,, 100 ,,0,118, ,084, . 100 ,,0,192, 1155 114 000125' • WORD 085, ,100 .,0,211. ,086, .100 ,,0,040, 1156 134 000131 • WORD 089,, 100, .,0,474. ,090. .100 ,#0,074, 1157 154 000133 • WORD 091. ,100, .,0,097, ,092,, .100, ,,0,036, 1158 174 000135 • WORD 093., 100, ,,0,088, ,095,, . 100, ,,0,094, 1159 214 000141 • WORD 097,, 100, .,0,324, ,130,, . 100, ,,0,236, 1160 234 000150 • WORD 104,, 100, ,, 0,062, ,135,, 100, ,,0,061. 1161 254 000156 • WORD 113., 100, >, 0,045, ,111.1 133, ,,0,061, 1162 274 000171 • WORD 121. ,100. ,,0,045, ,122, t 100, ,0,055, 1163 314 000173 • WORD 123,, 100, .,0,270, ,141,i 100, ,,0,108, 1164 334 000220 • WORD 144,, 100, ,0,233, #145 (l 100, ,0,146. 1165 354 000226 .WORD 150,, 100, ,0,333, ,151,, 100, ,0,116, 1166 374 000231 • WORD 153., 100, ,0,126, ,154,, 100, ,0,241. 1167 414 000233: • WORD 155,, 100, ,0,119, #156,, 100, ,0,116, 1168 434 000235: • WORD 157. ,100, ,0,104, ,160,, 100, ,0,138. 1169 454 000241 .WORD 161,, 100, ,0,138, f 16?,, 100, #9#138, 1170 474 000243 • WORD 163., 100, ,0,105, ,164,1 100, ,,0,151. 1171 514 000245: • WORD 165,, 100, ,0,156, ,166,, 100, ,,0,151. 1172 534 000247 .WORD 167, ,100, ,0,285, ,170., 100, ,0,368, 1173 554 000255 • WORD 173,, 100, ,0,210, ,184,, 100, ,0,175, 1174 574 000271 • WORD 185,, 100, ,0,266, ,190., 100, #0,310. 1175 614 000277 • WORD 191,, 100, ,0,234, #192,, 100, ,0,225, 1176 634 000301 • WORD 193,, 100, ,0,158, #194,, 100, ,0,125. 1177 654 000303 • WORD 195, ,100, ,0,100, #196,, 100, ,0,122, 1178 674 000305' • WORD 197,, 100, ,0,128, #198,, 100, ,0,282, 1179 714 000307: • WORD 199, ,100, ,0,283, ,1330(2 13, 18 13000,100000,100000 1180 1 1181 734 TMPt • BLKB 30, 1182 772 000000 SBITl • WORD 1183 774 012136' FUNCl • WORD UPDATE, QL IIERY,OR DERI 1184 J 1185 002 005067: PR063I CUR 3BIT 1186 006 012767 MOV W2/F3TAT 1187 014 004567 FGETI JSR R5,GET 1188 020 000002 FSTATt .WORD 2 1189 022 011734* • WORD TMP! . 1190 024 001040 BNEi ERPB3. 1191 026 122767 CMPB *3l,TMPi 1192 034 001404 BEQ 0K3: 1193 036 056767 B13 IERR#F8T/i iT • 1194 044 000763 BR FGET 1195 046 116700 0K3I M0V8 THP+12,RG I 1196 052 042700 BZCi *177770,F [0 1197 056 005300 DEC R0 80 .MAIN. MACRO V005C- 31-JAN-70 00119 PACE !♦ 1198 083 006300 ASLi R0 1199 082 020327! CMP R0,*6 1200 066 302014 bge; QUIT 1201 e70 304770 J3R PC,#FUNC(R0) J202 074 005767 TST STATUS 1203 103 301312: BNEI ERPG3 1204 102 305767 TST 3BIT 1205 106 301337 BNE. ERPG3: 1206 110 012767 MOV *2,F3TAT 1207 116 300736 BR FGET 1208 120 316767 QUITl MOV PGFJN, STATUS 1209 126 000207 ERPG3I RTS PC 1210 i2li t i 1212 130 000000 TYPEli .WORD 3 1213 132 000300 REC1I .WORD 1214 134 300300 COSTlt • WORD 1215 . t 1216 136 312767 UPDATE! MOV *TYPE1,PRM100 J217 144 304567 UPLOOPl JSR R5,GET 1218 150 000002. .WORD 2 1219 152 011734' .WORD TMP* 1220 154 301320 BNE ! EX1PG3 1221 156 305767 TST TBIT 1222 162 302413 BUT ER1PG3 1223 164 304567 JSR R5,DT00 1224 170 300300 PRM100! .WORD 1225 172 026727 CMP, PRM100,#COSTI 1226 233 001407 BEQ 0K31 J227 232 062767 ADD #2,PRM100 1228 210 000755 BR UPLOOP i'229 212 005267 ER1PG3I INC> SBIT 1230 216 000207 EX1PG3I RTS PC' , 1231 220 004567 0K31I JSR R5,L00K' J232 224 312130* • WORD TYPE! 1233 226 001401 BEQ Fl 1234 233 303207: RTS PC 1235 232 305767 Pi 1 TST REC1 1236 236 001406 BED SREC< 1237 243 066760 ADD RECl r 2(R0) 1238 246 166760 SUB REC1HCR0) 1239 254 005767 SRECl TST C0ST1 1240 260 0ei4O3 BEQ SCOST 1241 262 016760 MOV CO3TW6CR0) 1242 273 000207 SCOSTl RTS PC 1243 t 1244 272 303300 TYPE2I • WORD 1245 274 QNT2I • BLKB 30.. 1246 332 0RD2I .BLKB 30,. 1247 370 C0ST2I • BLKB 33, 1248 > 1249 426 004567 QUIERYl JSR R5,GET 1253 432 000302: • WORD 2 1251 434 311734' • WORD TMP' 1252 436 301011 BNEI EX2PG3 1253 440 005767 TST TBIT 1254 444 002404 BLT ER2PQ3 81 .MAIN. MACRO VBaSCi 31-JAN.70 00119 PAGE it 1255 1255 1257 1258 1259 1263 1261 1262 1263 1264 1265 1266 1267 126B 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 * 9fl9 %hz 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 ,305 1306 1307 1308 1309 1310 1311 446 452 454 456 462 464 470 472 474 476 534 506 512 516 520 522 530 532 540 542 550 554 556 562 564 570 572 57-1 576 604 606 614 616 620 622 624 626 664 722 726 730 732 734 743 742 746 750 754 756 760 762 766 77^ 774 776 004567 0122721 000403 005267 ER2PG3I 0032J7 EX2PG3I 004567 0K32I 012272' 301 4 Jl 0C32J7 012767 F2l 035723 121 013367 004567 000303 PRM101I 000300 PRM102I 026727 001404 062767 000761 012767 OKZi 004567 012370' 004567: L3» 000003 PRM103I 004567 003004 000000 031332 G26727 001726 062767 000760 I 000300 TYPE3I 000300 QNT3I 003300 3HIP3| 000300 C0ST3I SHIP30I COST30I I ORDER} 004567 000002. 01 1734 » 001024 005767 002417: 004567: 012616* 004567 000002: 011734' 001011 005767! O024J4 004567 012620* 000403 J8R R5,DT00< .WORD TYPE2; BR 0K32: INC' SBIT RTS PC JSR R5,L00K .WORD TYPE2; BEQ F2 RTS PC MOV #GMT2 # PRMi02 TST (R3)t MOV R0 r PRM101 JSR R5,0TOD •WORD .WORD CMP PRM102,#CO3T2, BEQ OKZ ADD *30,,PRM102 BR L2 MOV #QNT2,PRMi03 JSR R5,DPINX .WORD C0ST2: JSR R5,PUTD3Pi .WORD JSR R5,GET .WORD 4 •WORD BNE! EX2PG3 CMP: PRM133,#COST2. BEQ EX2PG3 ADD *30,,PRM103 BR L3 •WORD •WORD •WORD • WORD' .BLKB 30,. .BLKB 30. JSR R5,GET •WORD 2 • WORD TMPl BNE! EX3PG3- TST TBIT BIT ER3PG3 JSR R5,DTQ0' • WORD TYPE3. JSR R5 r GET • WORD 2: • WORD TMPl BNE: EX3PG3 TST TBIT BLT ER3P03- JSR R5,DTQ0 •WORD QNT3 BR 0K33 82 .MAIN. MACRO V0O3C« 31-JAN-70 00119 PAGE If 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1333 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 134 5 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 J356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 000 004 006 012 014 016 020 026 030 034 036 044 052 060 062 070 074 100 104 110 112 114 122 124 126 132 134 136 142 144 146 152 154 160 162 166 170 172 174 200 202 206 210 212 214 220 224 226 232 234 236 240 244 246 250 254 005267 000207 004567 012616 001401 000207 026067 003403 0167J3 000417 066760 166060 022760 0034O3 062760 016303 005367 160360 010367 O057J3 001405 066367 005303 000771 004567 012622 012626 304567 012624 012664 004567 012664 004567 012626 004567 000004 000000 001302; 004567 0126641 004567; 000004 000000 000207: 012700 027510 001410 062700 005710 002371 005725: 005267: 000205' 005725 005067. 000205: ER3PG3I EX3PG3! 0K33I F3| BO! NADO; ADDITl ADDAGNI! D0N3I I LOOKI RLOOKt FINDITI INC" RT3 JSR .WORD BEQ RTS CMP BLEi MOV BR ADD SUB CMP BLEi ADD MOV CLR SUB MOV TST BEQ ADD DEC' BR JSR .WORD .WORD JSR .WORD • WORD JSR • WORD JSR .WORD JSR .WORD .WORD BNEi JSR .WORD JSR • WORD: .WORD RT3 MOV CMP. BEQ ADD TST BGEl TST INC. RTS TST CLR RTS 3BIT PC R5,L00K: TYPE3. F3 PC 2(R0) f QNT3 BO QNT3,R3. ADDIT QNT3,4CR0) 2(R0),4(R0) *130,,4(R0) NADD *130.#4(R0) 2(R0),R3 C0ST3 R3,2(R0) R3,SHIP3 R3 D0N3 6R0 •CR5),CR0) FINDIT #10/R0 (R0) RLOOK!