LIBRARY OF THE UNIVERSITY OF ILLINOIS AT URBANA-CHAMPAIGN 510.6-1 no.212-2-20 Digitized by the Internet Archive in 2013 http://archive.org/details/hybridcircuitdes220ober Report No. 220 >UU^6 4. Z 7,d v C00-1U69-00U9 t HYBRID CIRCUIT DESIGN OF THE ARTRIX GRAPHICAL PROCESSOR, EUNtfVtfTK jtfR-4 1%? by PETER ERNST RUDOLF OBERBECK January 7> 19^7 DEPARTMENT OF COMPUTER SCIENCE • UNIVERSITY OF ILLINOIS • URBANA, ILLINOIS THE UoRARV GF Tr,E Report No. 220 HYBRID CIRCUIT DESIGN FOR THE ARTRIX GRAPHICAL PROCESSOR by PETER ERNST RUDOLF OBERBECK January 7 > 196" 7 Department of Computer Science University of Illinois Urbana, Illinois 6l801 Ill ACKNOWLEDGEMENT The author wishes to express his gratitude to Professor W. J. Poppelbaum who conceived the basic Artrix System, and whose efforts made the actual construction possible. His enthusiasm even during difficult times was greatly appreciated by all. Special thanks is also given to William Kubitz and David Rollenhagen for their design of the display and memory system, and to John Esch for his design of the digital processor. Furthermore, the author wishes to thank Al Irwin for his efforts in building the main frame and his help in debugging the system. IV TABLE OF CONTENTS ACKNOWLEDGEMENT iii LIST OF FIGURES v 1. INTRODUCTION 1 2. CAPABILITIES AND OPERATION OF THE SYSTEM 3 2.1 Line Construction 3 2.2 Circle Construction 3 2.3 Erasing h 2.h Freehand Construction 5 3- BASIC SYSTEM LAYOUT 6 3-1 Display and Storage System 6 3.2 Local Erase System 9 k. GRAPHICAL PROCESSOR 10 h.l Generation of Circles 10 h.2 Generation of Lines 11 U.3 Digital Processor l6 h.k Hybrid Processor 17 k.k,l Circle Operation 20 U.if.2 Line Operation 21 5- HYBRID CIRCUIT DESIGN AND DESCRIPTION 23 5 .1 DC7GLA (Digitally Controlled Variable Gain Linear Amplifier) 23 5.2 D/A Converter 27 5.3 DC and AC Mixer and Amplifier 31 5.^ Plus and Minus Sine and Cosine Generator 35 5.5 Comparator 39 5.6 Q,06k MEz Clock lH 5.7 DC Adder and Amplifier h2 6 . CONCLUSION kk BIBLIOGRAPHY ^7 LIST OF FIGURES FIGURE PAGE 1. Block Diagram of System. 7 2. Storage -Display System. 8 3. Erase Operation 8 k. Generation of a Circle with Sine and Cosine Functions. 12 5 • Generation of a Line "with a Positive and a Negative Sine Function. 15 6. Counter Scheme Used to Obtain Digital Positions of Points. 18 7o Hybrid Processor. 19 8. Basic Scheme of DCVGLA. 25 9. Schematic Diagram of DCVGLA. 26 10. Basic Scheme of D/A Converter. 29 11. Schematic Diagram of D/A Converter. 30 12. Basic Scheme of DC and AC Mixer and Amplifier. 32 13« Schematic Diagram of DC and AC Mixer and Amplifier. 33 1^. Schematic of Plus and Minus Sine and Cosine Generator. 36 15. Schematic of Comparator. 38 16. Schematic of 8,06k MHz Clock. l K) 17. DC Adder and Amplifier. hj> 1. INTRODUCTION As computer systems have "become bigger and bigger it has become increasingly difficult for people to communicate 'with the computer effect- ively. Ideally one would just like to talk to a machine, and tell it about ones problem, and then have a reply come back in the form of a printed output, or a picture on a graphic display, or a spoken answer. The printed form of question and reply is the most commonly used today. Some systems are capable of giving a spoken reply, but are not capable of receiving a spoken command. Graphical input and output have become a reality over the last few years and have shown great promise as being an efficient way of communicating with a computer , Most graphical consoles used to date will generate or recognize a drawing or symbol on a point by point basis. Elaborate calculations and logic must be performed with each point in order to determine what to do with it. This type of processing obviously requires a great deal of computational equipment to process even the most trivial drawings, e.g., a straight line . It seems, therefore, that the price one pays in "talking" to a computer through a graphical terminal is to use another computer as an interpreter. It seems to be a waste of expensive equipment to tie up a big machine with possibly trivial problems, and one begins to look for simple means to do graphical processing. The Artrix Graphical Processor is a high speed, on-line graphi- cal processor capable of doing all Euclidian constructions . (those construct- ions that can be done through the use of a compass and straight-edge only) without the use of a large digital computer. It was conceived with the idea in mind that graphical processing could be done rapidly and effectively through the use of both analog and digital circuitry, For graphical displays an accuracy of «3 percent is sufficient, hence simple digital and analog circuitry could be used. By making effective use of the best features of analog and digital circuits a minimum of total equipment was used, and high-speed graphical pro- cessing without the use of a large digital computer became reality. In order to make use of both digital and analog circuitry one has to overcome the interface between the two. The design of hybrid digital-analog circuitry enables one to make the best use of each and becomes therefore a very important part of the design con- siderations of the Artrix system. Of particular interest is the DCVGLA (Digitally Controlled Variable G-ain Linear Amplifier) whose function is to control the amplitude of a sinusoid in response to a digital input. The de\~ice is capable of digitally changing the amplitude over the range of 512 points at a speed of about 2 MEz. Response of the entire system is such that all drawings appear flicker -free and instantaneous as far as the operator is concerned. The effective use, need, and design of this and other practical hybrid circuits as regards graphical processing will be discussed in this thesis. 3 2. CAPABILITIES AND OPERATION OF THE SYSTEM 2.1 Line Construction The operator is capable of constructing a line between any two points on the screen. First the construction points used are indicated with a light pen and appear on the display screen as dots. The operator now presses a button to put him in the line construction mode. Now, by pointing the light-pen in the neighborhood of a point and pressing an "enable" button on the pen he will store the coordin- ates of this point as point one. Similarly a second point is indic- ated. As soon as both points have been indicated an "execute construct" button will light up, and upon depressing it, a straight line will appear between the two points indicated. The operator can now trans- late this line to any other point on the screen by resetting and reindicating point one. This feature enables the operator to draw a series of parallel lines on the screen. In actual Euclidian constructions one has to "construct" a parallel line using a compass and doing several operations before such a line may be drawn. Since it is often desired to construct parallel lines it was felt that this feature is essential to the system, although it is not a primary Euclidian construction. 2.2 Circle Construction As in the line construction the operator can indicate a series of construction points on the screen with a light pen. He then goes to the circle construction mode by pressing the approp- riate button. The first point he now indicates will correspond k to the center of the circle. Indicating a second point on the screen will correspond to indicating a point on the circumference of the circle. Again as in the line construction the circle "will be drawn when the ''execute construct" button is depressed. The operator can now translate the circle with the same radius to any point on the screen, by reindicating point one. Similarly the radius can be changed by reindicating point two. This will result in constructing a circle with a new radius and using the previously indicated point one as the center. These two basic circle operations correspond to the actual operations one can carry out with a compass. For both line and circle operation the construction points used to indicate the position and size of the lines can be erased by pushing a button marked "erase point". (Note that no constructions can be made without these construction points) . This is done to avoid confusion between the construction point and a construction line or circle segment. 2.3 Erasing If one wants to erase part of a line or circle, one first goes into the erase mode. The part of the construction that is now to be erased is traced over by the operator with the light pen. The part to be erased will appear black on the screen until the "execute erase" button is depressed. At this time the black lines and the "underlying" lines to be erased will disappear. 5 2 oh Freehand Construction Should one encounter a drawing where it is necessary to draw something other than a circle or a line, one can go to a "write display" mode where it is possible to do freehand sketching or writing. All one has to do is to keep the enable button on the light-pen depressed as long as one wants to write. This feature is especially useful for filling in gaps, and for lettering. 3- BASIC SYSTEM LAYOUT Figure #1 shows a basic block diagram of the Artrix System. 3.1 Display and Storage System The basic method used to store and display constructions and construction points is to have a vidicon look at a storage tube, which is simultaneously scanned (in synchronism) with a standard television monitor, and to gate the storage tube on each time the scan on the monitor intersects the light -pen. The light -pen is a photosensitive device, that will produce a short pulse each time the beam on the monitor scans past it. The point that occurs on the storage surface is then displayed on the point indicated by the light -pen on the monitor. This point will remain displayed until the storage tube is erased. It is interesting to note, that the vidicon merely provides an optical feedback path" necessary to view what was written on the storage tube. One could still write on the storage tube even though the vidicon were not turned on. All construct- ions are done and stored on one storage tube. All construction points are stored on another storage tube . They are called display and point memories respectively. This enables the distinction of construction points from actual constructions by the processor, and also allows complete erasure of. all construction points without indicating each one of them beforehand. One can also do freehand construction in either one of these storage tubes. Figure #2 illustrates the vidicon-TV monitor-storage tube combin- ation. ... o o r it to A I Q ) cr .J o CO CO o O Q O cr Q_ 0) -p >> CO o 3 fciD Cfl •H ft ^ O o H H •H P •H ra o CM -P •H 3 O a o •H -P 03 U (D o 5 LT\ =*= CD •H P-4 16 4.3 Digital Processor We can now construct any circle given digital information about the location of its center and the magnitude of its radius . We can also construct any line given the coordinates of the first point of the line and the horizontal and vertical distances to the second point o The problem is how to obtain these digital signals corresponding to the position of points and magnitudes of distances. Since the display used in the Artrix system is of the TV type it was thought to divide the TV raster into a 512 by 512 matrix. In doing so^ a "horizontal counter" counted down the 512 points on a horizontal line., and a vertical counter would count down the 512 lines in a frame.. Hence the content of the horizontal and vertical counter would contain the digital coordinates of the beam that sweeps out the raster at any time . It should be pointed out that the resetting (or spilling over) of the horizontal and vertical counters are used to provide the horizontal and vertical synchronization signals for the raster that sweeps the TV monitor., the cameras and the storage memories. A 512 by 512 matrix was chosen since this is close to the 525 by 525 resolution that should be found in a "500" line TV system. Furthermore^ 512 is the count that can be obtained in a 9 bit counter. If one now controls a second set of counters by the master counters and stops them at some particular time^ the count contained in them will corres- pond to the position of the beam at the time the count was stopped. By detecting the position of the beam with a light sensitive device and using its output to stop the second set of counters one will store in these counters the digital position of the point indicated by the light sensitive device (light -pen) . By this method a convenient way of obtaining the IT digital position of a point indicated by a light pen has been found. We will call the coordinates of these points horizontal point one (HP ) and vertical point one (VP , ) . Next, one would like to generate the difference of the coord- inates to the second point (clearly those are needed in the equations that describe the lines) . This is done by simply starting a third set of counters at the time point one (HP,, VP, ) "was indicated, and stopping them with the second output from the light pen, called point two (HP p , VPp) . Since the counters spill over and start again from zero once a 511 count has been reached, the magnitude of the count they contain will always be relative to the point one counters and be equal to the difference between point two and point one. An illustration in Figure #6 will clarify this procedure. As we shall see later the circle operation requires the direct coordinates of point two (not relative to point one) . This is done simil- arly to obtaining point one by using a different gating sequence in start- ing and stopping the third set of counters. h ,k Hybrid Processor We have discussed the production of lines and circles and various digital signals corresponding to coordinates and differences of coordinates on the display. We shall now investigate how these are put together to form lines and circles as indicated on the display. A block diagram of the hybrid processor is shown in Figure #7 and will be helpful in the forthcoming eirplanations . All control inputs are from the digital proc- essor and are in digital form. All outputs (excepting the one from the 18 UJ CO -p c •H o Ph Ch O co C o •H P •H CQ O pH H P •H hO •H n G •H CS -P s O P nd (1) CQ ID ^ .S o CO - UJ UJ J S o o O (D O CO o •H w 03 pq co *&= j (M ^ ( > <\l p 7 * tf ■ jn ♦ * * 8 to "SB ! s 3 : oi- C5 > H IN O 03 •H O o ■H -P 0) o CO ON =*= u w ■H z dd d = < < a 27 significant bits of the chain. For the last three bits 1$ resistors were found adequate, and at this value (2 R ) the saturation resistance of the transistor was also negligible. The resistance chain was adjusted such that any two adjacent bits would provide an output voltage in the ratio of 2: 1. The switching in and out of the resistor was accomplished by a two stage switching circuit. Two stages were needed to provide compati- bility with the logic levels of the digital system, and to provide the high gain needed to drive the first two most significant bits . Peak currents of the order of 200 ma are expected to flow through the trans- istor turning the most sifnificant bit on and off. The accuracy of the system is one part in 512 or about .2$. The limiting factor in adding on more bits is that the resistance of the least significant bit be less than the total parallel resistance of the backbiased collectors of all the other legs- Another way of looking at this is to note that the current flowing in the least significant leg be greater than the total leakage currents in all the other legs. The other limiting factor is that the AC open path in the bias drive indeed look large compared to the resistance of the least significant bit. It was this factor that limited the accuracy of the circuit. We used an inductance of 8 Hy to provide an AC impedance of about 500K compared to about 50K in the path of the least significant bit. 5.2 D/A Converter The D/A converter is essentially a much simplified version of the DCVGLAo There are several things that simplify its design consider- ation. For one thing, we are only concerned with DC levels; There are no AC components. This eliminates bias problems and AC isolation immed- 28 iately. The detection mechanism can now be a differential amplifier sensing current through a resistor. The need for a constant controlled AC source is eliminated., since the DC supplies can essentially perform this function o The need for high power levels,, and hence a two stage switch is also eliminated,, because there is no AC open circuit bias chain that puts a limit on the resistance of the least significant bit o The limiting factor is now the leakage current in the rest of the chain,, which can be made extremely small;, by choosing low leakage transistors. A basic diagram of the D/A converter is shown in Figure #10 and Figure #11 shows the actual circuit configuration. Conversion accuracy of the circuit is one part in 512^ and maximum conversion frequency was about 2.5 megabits per second. That is to say that any bit can be switched at a 2.5 MHz rate and the output will produce a 2.5 MHz waveform. The limitation of the uppermost conversion rate is governed by the RC time constant of the least significant bit. The value of the summing resistor R should be small compared to the resistance R in the most significant bit of the binary resistance chain. The output variation for a zero to 511 digital input variation was -10 volts for zero and -1^ volts for 5H» These levels had to be amplified again in the mixer stages in order to be compatible with the + 10 volt swings required for full screen deflection. Zero volts horizontal and vertical would represent the center of the screen. Performance of the D/A converters proved excellent throughout the use in the system. Hi 29 >N. O 01 CVJ MlCVJ <0 .^ o H- o 3 O ° <>— |h- < P qn o oc ill 1 u. a _i o CO CL z5 o •H << 03 o_j pq < HIGH ENTI 9 tr CD LU N u_ M u_ •H Ph 50 u CD -p CD > c o o o g 03 ?H M 03 •H O o •H •P CO S 03 Xi o CO H H CD 60 •H 31 5.3 DC and AC Mixer and Amplifier Another analog circuit with digital control is the DC and AC mixer and amplifier. It was designed to perform several functions , two of which depend on the presence or absence of a digital signal. The operations the circuit can perform are the following. First, the circuit is a precision adding or subtract- ing circuit of DC levels <> Second., it is a compensated differential DC amplifier. Third, it is a mixer which takes the DC level (DC offset) of a D/A converter and mixes it with one of the sinus- oids . As mentioned above it can be digitally controlled to perform addition of two variable levels, or addition of one variable and one fixed level. The circuit is also an output buffer for the hybrid processor. Figure #12 gii^es a complete schematic of the circuit. Operation of the circuit is as follows. First let us consider the digitally controlled DC adder and subtracter. The digital control signal corresponds to either line or circle operation. For the line operation (Section h .2) a DC offset of the same magnitude as the sinusoid is added in to prevent extension of the line through point one. Also, another DC offset was needed that would translate point one to the proper point on the screen. The digital signal for line operation selects current source I„ in this mode. Both current source I and I are controlled sources. I is controlled by the D/A converter that determines translation, and I is controlled by the D/A converter that determines the addit- ional DC offset to prevent extension of the line through point one. These two currents are then summed through R and the voltage across s 32 »- O CO "~ 1 k _l cc tf) i 1 tr LU u. _l Q. o5 LU o z o z r— 0. H H Si? _» 0- £ _J - z z < cc 1- o o Q 8 s (D •H *-• ^ iWV + iHi 1 c! o ro in «*> <\J ^ — »VW- HI |l"- ^3— |l- -WVV 1 j I I ^ i/WV- o CO K O .n ¥ V o ■p u B o tin O O •H -P 5 o CO H •H 39 5 .5 Comparator. It was explained in Section h.l that radii of circles were determined by a comparison method. The expanding sinusoids were compared to the DC levels of the horizontal and vertical portions of point two. Upon coincidence of both vertical and horizontal Aroltages the radius was stopped from increasing. The circuit configuration is shown in Figure #15° It con- sists essentially of three sections. First the differential amplifier, second a "NOR" circuit to sense two equal voltage levels, and third a single -shot to provide an output pulse of fixed width. In considering the differential amplifier, one must realize that it must be able to compare any two voltages in the range of + 10 volts. Since it is conceivable that one input can be + 10 volts while the other might be -10 volts, a differential voltage of this magnitude will break down the base to emitter junction of most transistors, so special precautions must be taken. A diode "with a high breakdown voltage must be used in series with the base. The diode is forward biased by a 100K resistor tied to -25 volts. A constant current source is used in the emitter circuit of the differential amplifier to provide high sensitivity. When both inputs are equal, current splits evenly between the two legs of the amplifier, and the "NOR" circuit is such that it changes state when the voltage in both legs of the circuit are equal. This change indicating equivalence is used to trigger a single shot of ,2}j,s duration. Since accuracy of 1 part in 512 is desired the period of the TOKHz was divided by 512 to arrive at the .2us duration. i+0 AS o o O N -* O CO o o •H -P o CO H •H 41 The circuit will respond to a differential offset of 30 mv. This falls within the desired sensitivity of 40 mv. (This was obtained by dividing the maximum voltage variation by 512 which is the quantized voltage change) . It was found that the sensitivity of the comparator could be maximized by adjusting the value of the current source. This would essentially set the threshold for the " NOR " circuit. Perform- ance of the circuit showed good results in as far as radii of circles could be determined accurately and consistently. 5.6 8,064 MHz Clock In order to divide a horizontal line of 62.5 l-ts duration into 512 points a fundamental clock frequency of 8,064 MHz was needed. This clock would provide the synchronization signals for the entire system. To get the best stability and frequency accuracy a crystal controlled circuit was designed. A schematic of the circuit is given in Figure #l6. The configuration is a crystal controlled Colpitts circuit with tuned collector and emitter feedback with the crystal . The circuit is driven hard to provide good stability. Since a square wave is needed to drive the logic circuits of the processor, two transistors are used in a squaring circuit. The tuned collector has a secondary winding which feeds directly into the base of the first transistor. This transistor in turn drives the output transistor of the circuit. The output is a square wave with rise and fall trans- itions of less than 20 ns . At these speeds decoupling of the supplies through the closest physical path is of primary importance in main- taining a clean waveform with fast rise-time. Without this precaution severe overshoot and ringing took place. Layout of the circuit on 1+2 the printed circuit card was done in such a way as to obtain short interconnections. 5-7 DC Adder and Amplifier This circuit is basically similar to the one shown in Section 5«3j> but with some simplifications. It only amplifies DC and mixes it with the sinusoids., rather than mixing two DC voltages together also. The circuit configuration is shown in Figure #17 • The first section takes the DC voltage of the D/A converters and amplifies it by a factor of four. This is done with a differential amplifier whose second input is the zero reference of the D/A convert- ers. It can be adjusted by a potentiometer in the emitter circuit. This merely allows one to change the effective zero reference of the D/A converter input. The next section is an emitter-follower and level changer. The level is changed such that the DC output is centered with respect to ground. It is also used to provide a source for the mixer. Mixing is done in the same way as in the circuit of Section 5«3« That is,, the transformer output of the DCVC-LA is put in series with the emitter follower of the previous section, and then fed into another emitter follower. This last stage provides an output-buffer to the rest of the system. Through use of a differ- ential amplifier, good stability is obtained. Also a low gain factor makes the circuit insensitive to drift. ^3 LU Q UJ b_ O UJ Q- co in tn UJ tr> z o CD < CM en o: O i- c/> CO UJ cc u cu •H "H •H H I a a Q. kk 6 . CONCLUSION It can now be seen that through the effective use of hybrid digital-analog circuitry, (on which the most effective use of the desir- able properties of each technique is made)., one can perform all euclidian constructions without the use of a large scale digital computer. The digital processor of the graphical display, and its assoc- iated counters divide the screen into 512 x 512 points and provides a digital output for indicated positions or distances. Obviously a digital counter can perform these functions very well. To generate the lines and circles in a trivial manner analog circuitry is used to form Lissajous patterns. To use digital techniques at this point would require a great deal of computational equipment. Analog circuitry is the only simple way out. Now the analog information must be combined with the digital infor- mation. This is done with the newly developed hybrid circuitry. It digitally controls the amplitude phase as well as the routing of the analog signals. It is this close merging technique which allows one to perform seemingly complex operations in a simple manner. The speed of the system is also very high, since the display of constructions is done by a continuous analog wave form rather than a point by point plotting routine . Once the shape of the waveform has been determined by a set of counters and a digital-analog interface, no more calculations have to be done to continuously display a construction. Again one can see that the advantageous points of each system are used and then merged together. Unfortunately, one also inherits some of the disadvantages of each system in this type of operation. These difficulties, however, ^5 are not insurmountable, and usually just represent an upper limit to speed and precision. Analog information is limited in accuracy since it is hard to differentiate between two nearly equivalent voltages (or currents) over a large range. For a 512 by 512 point system this was no problem, but for a 1000 x 1000 point system the problems of accuracy would become more severe. A digital system is usually more accurate in the sense that even a very small digit is still represented by a "0" or "1" condition which is readily recognized. The disadvantage of a digital system however is that one would need as much circuitry as one wants accuracy in digits. For instance, one can store an analog number on a capacitor, and if the detection circuit is accurate, one can resolve this level to a certain accuracy, To store this voltage by digital means to the same accuracy would obviously require more than a capacitor and a detection circuit. Again these difficulties can be overcome by more elaboration in the involved circuitry o Another problem that was noted in the design of the Artrix system was that of drift caused by aging, temperature variation, etc. Great care should be taken to have all analog signals as stable as possible.. In most cases drift tends to be a cumulative rather than a canceling effect, and when an accuracy of one point in five hundred has to be maintained, this can become significant. Again, the high resolution is somewhat limited by the drift that might occur due to temperature variations and elaborate precautions should be taken for higher resolution systems. Despite these minor difficulties hybrid processing offers many advantages and shortcuts over present all-digital or all-analog 1+6 systems. It is felt that hybrid systems are very worthwhile and should be used wherever high speed, simplicity, and limited accuracy are called for . ^7 BIBLIOGRAPHY "Quarterly Technical Progress Report", (Hardware Systems Research), Department of Computer Science, University of Illinois, Urbana, Illinois. July-September, 19^5 » "Quarterly Technical Progress Report", (Hardware Systems Research), Department of Computer Science, University of Illinois, Urbana, Illinois. October -December, 1965* "Quarterly Technical Progress Report", (Hardware Systems Research), Department of Computer Science, University of Illinois, Urbana, Illinois. January-March, 1966. "Quarterly Technical Progress Report", (Hardware Systems Research), Department of Computer Science, University of Illinois, Urbana, Illinois. April-June, 1966. Pulse ? Digital, and Switching Waveforms , Millman, Jacob, and Taub, Herbert. McGraw-Hill Book Company, 1965. Selected Semiconductor Circuits Handbook , Schwartz, Seymour, Editor. John Wiley and Sons, Inc. i960. APR 5 1967