BH LIBRARY OF THE UNIVERSITY OF ILLINOIS AT URBANA-OHAMPAIGN Cop. 2. Digitized by the Internet Archive in 2013 http://archive.org/details/emulationofdiscf436yama ~ Report No. 436 sr/a^z„ 7< EMULATION OF DISC FILE PROCESSOR Hirohide Yamada June 1971 tfYOEIHH NOV 9 1972 UNIVERSITY OF ILUNOIS AT URBANA-CHAMPAIGN DEPARTMENT OF COMPUTER SCIENCE UNIVERSITY OF ILLINOIS AT URBANA-CHAMPAIGN URBANA, ILLINOIS * Report No. kj6 EMULATION OF DISC FILE PROCESSOR by Hirohide Yamada June 1971 Department of Computer Science University of Illinois at Urbana- Champaign Urbana, Illinois 6.I8O.I This work was submitted in partial fulfillment of the requirements for the degree of Master in Science in Computer Science, 1971 • HI Acknowledgement The author would like to express his great appreciation to his advisor, Dr. D. Kuck, for his sincere guidance throughout this work. The author also would like to convey his sincere gratitude to Mr. D. H. Lawrie for his guidance. Thanks are also extended to Mr. C. E. Carter, Mr. Bill Stellhorn and Mrs. Sandy Moy for their help. IV Table of Contents Page I. Introduction 1 II. Register Configuration 4 III. Definition of Word Instruction 5 IV. Example of Word Instruction 9 V. Definition of String Instruction 11 A. SI format 11 B. S2 format 13 C. S3 format .... ....... 14 D. S4 format . . . . .16 E. Decoding sequence . 18 F. String instruction specification . . . .19 1. Search forward. 19 2. Search reverse. 20 3. Compare . . 21 4. Find 23 5. Move forward . 24 6. Move reverse . 25 7. Translate . . 26 VI. Example of String Instruction 27 List of References. . . . 32 Appendix . ... . . 33 I. Introduction Today many big and fast computers are built, and in those computers, central processors are sophisticated so as to handle a variety of jobs in a fast way. On the other hand, in this real world, there are many jobs which have a lot of data but need only a little bit of simple data manipulation and the main task is to look for certain data that you want. For example, you digitize magazines of your favour and keep them on disk, and if you want to look at a certain article, you give a computer certain keys which indicate the article and the computer displays the article. In this kind of job, the main task of the central processor is searching the keys in the data stream. Our objective is to build a data processing system which handles simple operations, mainly search, on large amounts of data within a reasonable time and very cheaply. The outlook of the system is shown in Figure 1. All the data is stored in disks and is brought to S memory in blocks and processed. S memory is the main memory and contains programs for processing the data. Those instructions in S memory, which are called S- instructions, are fetched one by one by the interpreter and interpreted by the program in MN memory. S instructions are categorized into three parts, namely Word instruction, String instruction and I/$ instruction. In this paper the definition of Word instruction and String instruction and their interpretation are presented. S Memory J¥L Display MN Memory < ) Interpreter <" Figure 1 System Configuration data line control line II. Register Configuration The interpreter has the following registers in the logic unit: Al, A2, A3 16 bit general register B 16 bit buffer register MIR 16 bit memory information register CTR 8 bit counter register LIT 8 bit literal register Above those registers there are following registers in S memory: Register Memory Address Explanation IAR — 15 16 — 31 16 bit information address register — 15 PTRO -15 32 — 47 16 bit pointer register — 15 CHAO -15 48 — 63 8 bit character register 0—15 only least significant byte of a memory word is used CTRO -15 64 — 79 8 bit counter register — 15 only least significant byte of a memory word is used. III. Definition of Word Instruction A word instruction consists of OP code, XI, X2, and X3, where each takes one S memory word as shown in Figure 2. The format of OP code is shown in Figure 3. OP code is decoded from least significant bit to most significant bit and the meaning of each bit is as follows: Bit 15 indicates word instruction 13, 14 Indicates level of indirectness for the first operand as follows; 00 XI is the first operand 01 XI addresses the first operand 10 XI indirectly addresses the first operand 11 XI doubly indirectly addresses the first operand 11, 12 Same as bit 13, 14 except for the second operand 4 10 According to the value of this field, the following action is taken; Operandi and operand2=Al 1 Operandi and operand2 = Al OP code XI X2 X3 Figure 2 Word instruction format 1 2 3 4 10 11 12 13 14 15 J I O N 1 1 p 3 V F O T OP field IL.2 1 IL1 1 Figure 3 OP code format Operandi eqv operand2 = Al In this operation Al bits are set to one if the corresponding bits of both operandi and ope rand 2 are the same. Otherwise Al bits are reset. Operandi is shifted right by the amount of operand2 and placed in Al Operandi is shifted left by the amount of operand2 and placed in Al Operandi is rotated right by the amount of operand2 and placed in Al Operandi + operand2 =A1 If over- flow does not occur, OVF bit is reset Operandi — operand2 = Al If over- flow does not occur, OVF bit is reset Operandi is compared with operand2 and if those are the same, 8000 (hex) is set to the Al. Otherwise Al is reset. Address of X2 of current instruction plus operand2 is stored in address specified by operandi, and Al is set to 8000 (hex) If this bit is on, Al is complemented 2 If this bit is on, the address of current instruction minus one is stored in LARO and program control is passed to the content of IAR1 plus one. 13 and JP bits are ignored. 1 If this bit is off, X3 is passed as the address to bit 0. If on, content of S memory addressed by X3 is passed to bit as the address. If this bit is off, Al is stored into the S memory address passed from bit 1 and control goes to the next S instruction. If on, and sign bit of Al is on, program control is passed to the instruction whose first word address is the address passed by bit 1 plus one. If this bit is on, and sign bit of Al is off, program control is passed to the next S memory instruction. IV. Example of Word Instruction The following notations are used to ease the explanation: X (X) ((X)) X Literal X or address X Content of S memory word at address X Content of S memory word at address (X) Store into address X Don't care Example 1 XI OR (X2) = X3 O N J 1 V O Bit p 3 F T OP field IL2 IL1 15 1 01 00 Example 2 If sign bit of (XI) and (X2) are not the same, jump to X3. Else go to next instruction. J I O N p 3 V F O T OP field IL2 IL1 I 1 2 01 01 10 Example 3 (XI) + ((X2)) and if overflow does not occur in this operation, store it into (X3). If overflow occurs, don't change (X3), save current instruction address into IARO and jump to (IAR1). O N J 1 V O p 3 F T OP field IL2 IL1 1 1 6 10 01 Example 4 If (XI) and X2 are the same jump to X3+1, else go to next. 1 o N J l V O p 3 F T OP field IL2 IL1 1 8 00 01 i Example 5 Store current address + X2 into XI and jump to X3. O N J i V O p 3 F T OP field IL2 IL1 1 9 00 00 11 V. Definition of String Instruction A string instruction consists of four consecutive words SI, S2, S3 and S4 in S memory as shown in Figure 4. SI S2 S3 S4 Figure 4 String instruction format The detailed format of each word and its meaning is explained below. Each instruction is decoded from SI to S4 and from the least significant bit to the most significant bit in each word. A. SI format The detailed format of SI word is shown in Figure 5, and the meaning of each bit is as follows; Figure 5 SI word format 6 7 8 11 12 13 14 15 R R S A C C K 2 I A2H P I A2L P P 1 C 2 2 1 1 1 7X ~r A2 low load control A2 high load control 12 Bit 14-15 Each string instruction has always 01 in these bits. 13 If this bit is on, bits 7—12 are neglected. If this bit is off, bits 7—12 have the meaning as explained below. 12 If this bit is off A2L points to one of the character registers. If on, A2L points to one of the pointer registers. 8-11 These bits are a register number which is selected by bit 12. 7 If this bit is on, the lower byte of the A 2 register is loaded by the character pointed by the content of the register specified by A2L and RCP1. If this bit is off, the lower byte of A2 register is loaded by the character in the lower byte of the register specified by A2L. and RCP1. 1-6 Same as bit 7 — 12 except those bits load into higher byte of A2 register. If this bit is on, bit 1 and bits 7 — 12 are all neglected and the full A2 register is loaded by the contents of the register specified by A2H and RCP2. In this case 12 must be zero. If this bit is off, this bit is neglected. 13 B. S2 format The detailed format of S2 word is shown in Figure 6, and the meaning of each bit is as follows; 6 7 ■— I — 10 11 14 15 OP field A3S A1S V A s K P 2 \ Al load control A3 load control Figure 6 S2 word format Bit 15 11-14 7-10 0-6 If this bit is on, Al register is cleared and bits 11 — 14 are ignored. If this bit is off, Al register is set according to A1S. This is a character register number and upper byte and lower byte of Al register are loaded by its content. This is a pointer register number and A3 register is loaded by its content. This field distinguishes the instructions as follows and the detailed explanation of each instruction is given in V. F. Search forward Search reverse Compare 14 3 4 5 6 Others Find Move forward Move reverse Translate Undefined C. S3 format The detailed format of the S3 word is shown in Figure 7, and the meaning of each bit is explained next. Bits 15-11 are decoded before the execution of the execution routines which are explained under F. Bit 10-0 are decoded after the execution of them. 3 4 5 6 7 8 9 10 11 14 15 N P P P P P P R X D D D K K K C DES1 T 1 I 1 D 1 A 1 I D A CTRS H C Jump control 1 CTR load control Figure 7 S3 word format 15 Bit 15 If this bit is on, bits 11 — 14 indicate one of the counter registers (CTRO - CTR15). If this bit is off, bits 11—14 indicate one of the character register (CHRO — CHR15). 11-14 This field is a register number selected by- bit 15 and the CTR register is loaded by the lower byte of its content. 10 If this bit is on the key pointer is incremented by one. 9 If this bit is on, the key pointer is decremented by one. 8 If this bit is on, the key pointer is initialized to the position before the execution of this String instruction. 7 If this bit is on, the data pointer is incremented by one. 6 If this bit is on, the data pointer is decremented by one. 16 5 If this bit is on, the data pointer is initialized to the position before the execution of this String instruction. 4 If this bit is on, program control is passed to the next instruction. If this bit is off, program control is passed to the instruction pointed by DES1. DES1 must point to the address to which you want to jump, minus one. 0-3 This field is an Instruction register number, and if bit 4 was off, program control is passed to the instruction specified by its content plus one. D. S4 format The detailed format of the S4 word is shown in Figure 8 and the meaning of each bit is as follows ; Bit_ 15 If this bit is on, tl*e data pointer is incremented by one. 14 If this bit is on, the data pointer is decremented by one. 13 If this bit is on, the data pointer is initialized to the position before the execution of this String instruction. 17 12 8-11 0-7 If this bit i3 on, the program control is passed to the next instruction. If this bit is off, program control is passed to the instruction specified by DES2. This field is an Instruction address register number and if bit 12 was off, program control is passed to the instruction specified by its content, plus one. Same as bit 8-15 except that these bits are for jump control 3. 3 4 5 6 7 8 11 12 13 14 15 N P P P N P P P DES3 X D D D DES2 X D D D T I D A T I D A 3 3 3 3 2 2 2 2 \ Jump control 3 Jump control 2 Figure 8 S4 word format 18 E. Decoding sequence The string instruction explained in detail in V-A through V-D is decoded in the following way; 1. Parameters needed for the execution of an instruction are loaded into registers Al, A2, A3, CTR as needed in the way specified by the SI word, the S2 word bits 7 through 15, and bits 11 through 15 of the S3 word. The parameters you need to set are explained under V-F. 2. Then according to the bits through 6 of the S2 word, the instruction is executed and according to the result of the execution, program control is returned to Jump control 1 through 3, that are bits through 10 of S3 word, bits 8 through 15 of S4 word and bit through 7 of S4 word. When and where the control is returned are explained under V-F. 3. Then the pointers are changed as specified by Jump control bits of your return and the program control is passed to the instruction specified also by the Jump control bits of your return. 4. After every execution of string instructions, the difference of the data pointer position before the execution of the instruction and immediately before the execution of the instruction, which is after step 3, is placed in Counter Register (CTRO). 19 F. String instruction specification There are six string instructions which are explained next. In this computer system, one word consists of two characters and one character consists of eight bits. In order to make things easier, the following notations are used: PD Pointer to a string of data and placed in A3 register during the execution of instructions, We call this the data pointer. PK Second pointer when two pointers are involved and placed in A2 register. We call this the key pointer. X Arbitrary character without restriction on the position in a word. Xj Arbitrary character placed in lower byte of a word. IX Arbitrary character placed in higher byte of a word. Pointer position 1. Search forward. . . Before the execution of this instruction, parameters must be placed as shown in Figure 9. 20 Al Mask Mask Figure 9 Parameter for search forward This instruction looks for Keyl, Key2, and Key3 in string PD. Before data is compared with Keyl or Key2, the data is ORed with MASK and then compared. There is no mask facility for Key3. Initial state Pointer PD X X X X X Find Keyl state Pointer XX X(X) X PD X)= Keyl masked Decode exit Jump control 2 Find Key2 state PD 4, Pointer XX x(x) X Xj= Key2 masked Decode exit Jump control 3 Find Key3 state Pointer PD x x x(x) x- X)= Key3 Decode exit Jump control 1 2. Search reverse. . . Before the execution of this instruction, parameters must be placed as shown in Figure 10. 21 Al Mask Mask Figure 10 Parameter for search reverse This instruction looks for Keyl, Key2 and Key3 in string PD in reverse direction. Before data is compared with Keyl or Key2, the data is ORed with MASK and then compared. There is no mask facility for Key3. Initial state Pointer PD XXX XXX Find Keyl state Pointer X X- PD x (x) X- -X X)= Keyl masked Decode exit Find Key2 state Pointer Jump control 2 X X- PD - -x 6?) x- X X)= Key 2 masked Program control Jump control 3 Find Key3 state Pointer PD - -x (x) X- X X- Program control Jump control 1 -X (x}= Key3 3. Compare. . . Before the execution of this instruction, parameters must be placed as shown in Figure 11. 22 Al Don't care Figure 11 Parameter for compare This instruction compares two strings PK and PD until it encounters unmatched character or Keyl in string PK. Initial state Pointer PD XX PD Pointer PK PK I X X X (X Didn't compare state Pointer PD El PD I X X - - X (X)= Key 1 compared character Pointer PK Decode exit PK I X X JumD control 2 Compared state Pointer PD PD X Pointer PK PK I 2 Decode exit Jump control 1 23 4. Find. . . Before the execution of this instruction, parameters must be placed as shown in Figure 12. CTR Key! Figure 12 Parameter for find This instruction looks for string PK in string PD until it encounters Key 1 in string PD. When the first character in string PK is compared with data in string PD, the data is ORed with MASK and then compared. Other bits are not masked. Initial state Pointer PD Pointer PK Find state Pointer PD PD 1 x x x ex) PK \ X X- X X - -X PD 1 X X ■ PK Pointer PK (Xj JX|- -(XJ (x) Didn't find state Pointer PD Pointer PK Decode exit X X PD X x (x PK I x X X 1 Jump control 2 = Keyl matched character 24 5. Move forward. . . Before the execution of this instruction, parameters must be set as shown in Figure 13. Al Don't care Figure 13 Parameters for move forward This instruction moves (count +1) MOD 256 characters from string PD to string PK in the forward direction. Initial state Pointer PD Pointer PK Finished state Pointer PD Pointer PK PD I X X PK I O O PD I XX X \ / Count + 1 PK n; 0= space to be moved in f O Count + 1 X)= moved character Decode exit Jump control 1 25 6. Move reverse. . . Before the execution of this instruction, parameters must be placed as shown in Figure 14. Al Don't care CTR Figure 14 Parameters for move reverse This instruction moves (count + 1) MOD 256 characters from string PD to string PK in reverse direction. Initial state Pointer PD PD 1 X X Pointer PK PK \ o o O = space to be moved in Finished state Pointer PD PD \ --- N x X X Count + 1 Pointer PK o PK x ®- - -®i Count 4- 1 ®= moved char Decode exit Jump control 1 26 7. Translate. . . Before the execution of this instruction, parameters must be set as shown in Figure 15. AL Don't care Figure 15 Parameters for translate This instruction translates each character in string PD according to the translate table whose location is pointed to by PK and places the results in string PD. It continues translation until it encounters Keyl in string PD. Initial state Pointer PD Pointer PK Finished state Pointer PD Pointer PK Decode control PD \ XX XIX PK-» Translation table PD X X X (X unchanged Jump control 2 X)= Keyl X = translated character 27 VI. Examples of String Instructions Example 1. Find string PK in string PD. Pointer to the string PK is in PTR1 and pointer to the string PD is in PTR2. The ends of both strings are indicated by '+' mark which is in CHR1. If string PK is found in string PD, you want to jump to (IAR3). And you want the pointer PK at the position before the execution of this instruction and the pointer PD at the position after the execution. If string PK is not found, you want pointer PD and PK at the positions before the execution and want to go to the next instruction. This problem is visualized in Figure 16 and coding is shown in Figure 17. PTR1 PTR2 CHR1 IAR3 PK ' ~ nn IT + Jump Addr. X X X + \ X X X + Figure 16 Picture of example 1 1 2 5 6 7 8 11 12 13 14 15 1 1 1 d d d 1 01 (a) SI coding 6 7 10 11 14 15 3 2 d 1 (b) S2 coding 3 4 5 6 7 8 9 10 11 14 15 (c) S3 coding 3 4 5 6 7 8 11 12 13 14 15 d d d d d d 1 (d) S4 coding 28 Figure 17 Coding for example 1 29 Example 2. You want to shift atring PD which is pointed by PTR1 one place left until either ' . ' mark or ' + ' mark is encountered. Those marks are set in CHR5 and 6. This problem is solved by two string instructions. This problem is visualized in Figure 18. PTR1 PTR2 CHR5 CHR6 X X X . - IAR7 IAR8 Jump ADDR1 Jump ADDR2 Figure 18 Picture of example 2 (1) Search for the character ' + ' or '. ' in string PD, in order to know how many characters have to be moved. Coding of this instruction is shown in Figure 19. (2) After Step 1, CTRO contains the number of characters we have to move. So initiate move forward instructions using this register. This coding is shown in Figure 20. 30 1 2 5 6 7 8 11 12 13 14 15 5 5 01 (a) SI coding 6 7 10 11 14 15 1 d 1 (b) S2 coding 34 5 6 789 10 11 14 15 d 1 1 6 (c) S3 coding 3 4 5 6 7 11 12 13 14 15 ' d 1 1 d 1 1 (d) S4 coding Figure 19 Coding of string instruction for example 2, step 1 31 1 2 5 6 7 8 11 12 13 14 15 01 (a) SI coding 6 7 10 11 14 15 4 1 d 1 (b) S2 coding 4 5 6 7 8 9 10 11 14 15 d 1 1 (c) S3 coding 15 Don't care (d) S4 coding Figure 20 Coding of string instruction for example 2, step 2. 32 List of References "APL/360 Primer, " IBM program product, GH20-0689-1. "APL/360 User's Manual, " IBM program product, GH20-0683-1. Bingham, H. W. , "The BD: Machine an APL Model for Micro- Instruction Execution in Interpreter Based Systems, " Burroughs Corporation, TR70-3, April 30, 1970. "Burroughs B5500 Time Sharing System- -Terminal User's Guide, " Burroughs Corporation. Burroughs Corporation, "The Interpreter, " TR70-2, February 16, 1970. Zucker, S. , "A Micro-Translator for the Interpreter Based Systems," Burroughs Corporation, TR70-1, February 10, 1970. 33 Appendix A Flow chart of word instruction interpretation 34 START FETCH ) FETCHO : 1«:SAR; Increment A2 by 1 Read(A2)-*A3 A3 shift R(1) Was A31st set? Yes STRING No Set LC1 FETCH 1 : J_ A2+1=:A2»:B; Set CTR to NOT IL value FETCH 2 : Read(B) — B Increment CTR by 1 < Is CTR overflowed? >-Nn L> Yes Is LC1 set? Yes B=:A1; No Exit to EXCO 35 a START EXECUTE) EXCOt OP field in A3— AMPCR Shift A3 R(7) B«:SAR; EXEC; CALL; EXC1: Shift A3 R(1) Was A3LST set? No Is LC1 set? No Reset OVF bit Yes NOT A1»:A1 Yes (overflow) Exit to STRO 36 BREQ: A1=B? No Yea Set A1MST SUB: ADD: NOT B«:B;B+1-:B No BMST-A1MST? Yes Set LC1 A1+B«:A1 < Is LC1 set? <^ \No Yes MST-BMST? nc — Reset A1MST y Yes Set LC1 Exit to EXC1 CALLR: Store A2+B — (A1) Set A1 to 8000 (HEX) START STORE 37 STRO: A3 shift R(1) Was A3LST set? No Set LC1; A2+1«;A2»jBj STR2: Read (B) -*>B No < Is LC1 set? > Yes A3 shift R(1) Was A3LST set? STR1i Yes Store (A2)-3— IAR0 Read IAR1-- A2 Yes STR3 No A3 shift R(1) Was A3LST set? Yes <^A1MST»1?\ No STRU: No Yes B -: A2 Store A1-MB) "£s- Exit to FETCHO 38 Appendix B Flow chart of word instruction interpretation 39 50 PROGRAM WRDINS ADR 1; 60 COMMENT THIS IS THE INTERPRETATION PROGRAM OF WORD 61 INSTRUCTIONS POR D PROJECT; 100 A1 AND B«jA1;SKIP; 200 A1 OR B«:A1;SKIP; A1 EQV B-:A1;SKIP; A1 R*:A1;SKIP; A1 L-:A1;SKIP; t A1 C«:A1 ;SKIP; 700 PLUS-1«:AMPCR; 800 SUB-1«:AMPCR; 900 BREQ-1-:AMPCR; 1000 CALLR-1-:AMPCR; 1100 SRCHF0-1«:AMPCR; 1200 SRCHRO-1-sAMPCR; 1300 CMPR0-1*:AMPCR; 1400 FIND0-1*:AMPCR; 1500 MVF0-1»:AMPCR; 1600 MVR0-1»:AMPCR; 1700 TRNSL0-1«:AMPCR; FETCH0: IF RMA THEN A2+B001-:BR2«:MAR«:A2 ELSE WAIT; STEP; MR2; IF RDC THEN ,BEX ELSE WAIT; B R»:A3; 1»:SAR; STRING-1»:AMPCR; 55STRING INSTRUCTION IF NOT LST THEN SET LC1 ELSE JUMP; 2=» S SAR; 3=:LIT; zouu FETCH 1 : A2+1=:B*:A2; 2900 FETCH2-1»:AMPCR; * nnn A3 AND LIT=jCTR; A3 R=*:A3; FETCH2: IF RMA THEN B»:BR2»:MAR ELSE WAIT; STEP; MR2; IF RDC THEN , BEX, INC ELSE WAIT; IF NOT COV THEN JUMP ELSE STEP; 3600 FETCH1-1««!AMPCR; 3700 IF LC1 THEN B«:A1;JUMP ELSE STEP; EXC0: 127»:LIT; A3 AND LIT=:AMPCR; STEP; XDUMMY DUE TO A BUG IN SIMULATOR "7—. CRD « 7=:SAR; A3 R«:A3; B=»:SAR; XPREPARE IN CASE SHIFT INSTRUCTION EXEC; CALL; EXC1: A3 R-:A3; 1=:SAR; IF LST THEN NOT A1«:A1 ELSE STEP; IF NOT LC1 THEN A3 AND B110*:A3 ELSE STEP; 40 5000 STROt A3 R-sA3; 5100 STR1-1«*AMPCR; 5200 IF NOT LST THEN A2+B001-iA2-iB;SET LC1 ELSE JUMP; 5300 STR2: IF RMA THEN B-$BR2-jMAR ELSE WAIT; 5350 STEP; 5400 MR2; 5500 STR3-1-:AMPCR; 5600 IF RDC\,THEN ,BEX ELSE WAIT; 5700 IF LC1 THEN A3 R»:A3 ELSE JUMP; 5800 STR2-1-:AMPCR; 5900 IF LST THEN JUMP ELSE STEP; 6000 STR3: A3 R-:A3; 6100 STR4-1«:AMPCR; 6200 IF LST THEN A1 ELSE JUMP; 6300 FETCH0-1»:AMPCR; 6400 IF MST THEN B«:A2;JUMP ELSE JUMP; 6500 STR4: IF RMA THEN B»:BR2-:MAR ELSE WAIT; 6600 IF RMI THEN A1-:MIR ELSE WAIT; 6700 FETCH0-1»:AMPCR; 6750 STEP; 6800 MW2;JUMP; 6900 STR1 : 16«:LIT; 7000 IF RMA THEN ,LMAR ELSE WAIT; 7100 NOT LIT-:B; 7200 3*:LIT; 7300 IF RMI THEN A2 ADL B-:MIR ELSE WAIT; 7350 STEP; 7400 MW1; 7500 IF RMA THEN ,LMAR ELSE WAIT; 7600 17=:LIT; XADDR IAR1 IS 17 7650 STEP; 7700 MR1; 7800 FETCH0-1»:AMPCR; 7900 IF RDC THEN ,BEX ELSE WAIT; 8000 B«sA2;JUMP; 8100 SUBj NOT B-jB; 8200 ADL B*:B; 83 00 PLUS: A1 EQV B; 8 400 IF MST THEN SET LC1 ELSE STEP; 8500 A1+B=;A1; 8600 EXC1-1»:AMPCR; 8700 IF LC1 THEN A1 EQV B ELSE JUMP; 8800 IF NOT MST THEN SET LC1;JUMP ELSE JUMP; 8900 BREQ: A1 EQV B»:B; 9000 0=sA1; 9100 ADL B*:B; 9200 EXC1-1=;AMPCR; 9300 IF AOV THEN A1 OR B1 00=:A1 ; JUMP ELSE JUMP; 9400 CALLR: IF RMA THEN A1-:BR2«:MAR ELSE WAIT; 9500 EXC1-1=jAMPCR; 9600 IF RMI THEN A2+B»:MIR ELSE WAIT; 9650 STEP; 9700 MW2;B100=:A1;JUMP; oann pmh 9800 END V .^ % \V ,OOND,